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TUSB1310A: Pin States in Chip Reset

Part Number: TUSB1310A

Hello,

I understand from the documentation that there is nothing special to be done on the board with the below signals, I mean this table is just to inform the user on these internal inputs state during reset right ?

What happen if one of these signals is set to an other value by the board ?

Table 5-1. Pin States in Chip Reset

PIPE CONTROL PIN NAME STATE VALUE

TX_DETRX_LPBK Inactive 0

TX_ELECIDLE Active 1

TX_ONESZEROS Inactive 0

RX_POLARITY Inactive 0

POWER_DOWN U2 10b

TX_MARGIN2-0 Normal operating range 000b

TX_DEEMP –3.5 dB 1

RATE 5.0 Gbps 1

TX_SWING Full swing or half swing 0 or 1

RX_TERMINATION Appropriate state 0 or

  • Hi Pierre,

    The information in Table 5-1 is just meant to defined the default states after reset if the system is not configured.

    Please be aware that the TUSB1310A device is an older USB 3.0 transceiver that is marked as not recommended for new designs. The device has documented errata and the USB specification has been updated numerous times since this device was released. While we can provide clarifications on the existing documentation of this device, we are not able to provide implementation support.

    Regards,
    JMMN
  • Thanks, it is clear.
    My application is not for production, it is for prototyping with FPGA purpose, it is the reason why I chose this phy.
    you scare me when you write "USB specification has been updated numerous times since this device was released"; I hope it still work in front of a standard PC right?
    Otherwise, do you have an other more up to date USB3.0 phy?
  • Hi Pierre,

    Yes, the TUSB1310A devices still work in standard USB systems. USB specifications are designed to be backward compatible so devices that were compatible with early versions will work with devices that are compatible to the most recent versions. We do not have a more recent USB 3.x phy available.

    Regards,
    JMMN