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DP83848K: Register of Compliance Test Mode

Part Number: DP83848K

Hello,

My customer has a question about DP83848.

[Q]

Please could you tell me a register mode of Compliance Test?

I refer to the following.
- Application Report 'How to Configure DP838xx for Ethernet Compliance Testing' (SNLA239A)
-> But I think that the Register in app note at P.13 and the Register of DP83848 do not correspond.
- E2E other thread 'DP83848 bit stream for compliance mode'
->Are only add 0x00 and add 0x1F interested? Other than Default?

<100 BASE-TX>

- Rise and Fall Time, Jitter

(App Note SNLA239A) -> (DP83848)
Reg 0x001F = 0x8000 -> Add 0x0000? = Default? //reset PHY
Reg 0x0000 = 0x2100 -> Add 0x0000 = 0x2100  //programs DUT to 100Base-TX Mode
Reg 0x0010 = 0x5008 -> Add 0x0019?  = Default?  //programs DUT to Forced MDI(MDIX) Mode
Reg 0x0009 = 0xBB00 ->Add ? = ?  //Test Mode 5
Reg 0x0024 = 0x0480 -> Add ? = ? //output test mode to all channnels

- Differential Output Voltage, Signal Amplitude Symmetry, Waveform Overshoot

(App Note SNLA239A) -> (DP83848)
Reg 0x001F = 0x8000 -> Add 0x0000? = Default? //reset PHY
Reg 0x0000 = 0x2100 -> Add 0x0000 = 0x2100  //programs DUT to 100Base-TX Mode
Reg 0x0010 = 0x5008 -> Add 0x0019?  = Default?  //programs DUT to Forced MDI(MDIX) Mode
Reg 0x0009 = 0xBB00 ->Add ? = ?  //Test Mode 5
Reg 0x0024 = 0x0480 -> Add ? = ? //output test mode to all channnels

(E2E other thread)
Reg 0x001F = 0x2407
But Reg 0x001F = reserved. Is it OK?

- Duty Cycle Distortion

(App Note SNLA239A) -> (DP83848)
Reg 0x001F = 0x8000 -> Add 0x0000? = Default? //reset PHY
Reg 0x0000 = 0x2100 -> Add 0x0000 = 0x2100  //programs DUT to 100Base-TX Mode
Reg 0x0010 = 0x5008 -> Add 0x0019?  = Default?  //programs DUT to Forced MDI(MDIX) Mode
Reg 0x0009 = 0xBB00 ->Add ? = ?  //Test Mode 5
Reg 0x0024 = 0x0480 -> Add ? = ? //output test mode to all channnels

(E2E other thread)
Reg 0x001F = 0x2406
But Reg 0x001F = reserved. Is it OK?

- Return Loss

(App Note SNLA239A) -> (DP83848)
Reg 0x001F = 0x8000 -> Add 0x0000? = Default? //reset PHY
Reg 0x0000 = 0x2100 -> Add 0x0000 = 0x2100  //programs DUT to 100Base-TX Mode
Reg 0x0010 = 0x5008 -> Add 0x0019?  = Default?  //programs DUT to Forced MDI(MDIX) Mode
Reg 0x0009 = 0xBB00 ->Add ? = ?  //Test Mode 5
Reg 0x0024 = 0x0480 -> Add ? = ? //output test mode to all channnels

<10 BASE-T>

- Link Pulse

(App Note SNLA239A) -> (DP83848)
Reg 0x001F = 0x8000 -> Add 0x0000? = Default?  //reset PHY
Reg 0x0000 = 0x2100 -> Add 0x0000 = 0x0100  //programs DUT to 10Base-T/Te Mode
Reg 0x0010 = 0x5008 -> Add 0x0019?  = Default?  //programs DUT to Forced MDI Mode

- TP-IDLE, MAU, Internal, Jitter with TPM, Jitter without TPM, Differential Voltage, Harmonic Content, Common Mode Voltage, Return Loss, Common Mode Rejection

Reg 0x001F = 0x8000 -> Add 0x0000? = Default?  //reset PHY
Reg 0x0000 = 0x2100 -> Add 0x0000 = 0x0100  //programs DUT to 10Base-T/Te Mode
Reg 0x0010 = 0x5008 -> Add 0x0019?  = Default?  //programs DUT to Forced MDI Mode


I'm sorry to trouble you, but I would appreciate it if you could tell us about Register.

Best Regards,
Kaede Kudo