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DS90UB954-Q1EVM: EV Board connection Setting (Software)

Part Number: DS90UB954-Q1EVM
Other Parts Discussed in Thread: DS90UB953-Q1EVM, , ALP

Hi

I have DS90UB954-Q1EVM & DS90UB953-Q1EVM.

I am trying to communication test with TI software.

This is PC monitor. (Please see attached file)

Could you tell me how to set up this soft ware ?  (Please see attached file)

No.1 Information Tab

#1-1 RX Port Configuration

-Could you tell me setting ?

#1-2 Current RX Port Status

-Status is not displayed.  Is it OK ?

No.2  Other Tab
Could you give me advice also  Remote Resister, Forwarding, GPIO, Registers and CSI Resister ? 

 (Please see attached file)

180909 TI FPD-LinkIII EVK Questions.pdf

Thank you.

  • Hello,

    please visit our learning center there you will find a training module (No. 6.1) which explains ALP and answers all your questions.

    training.ti.com/fpd-link-learning-center
  • i Jaradat

    Thank you for good support.

    We tried but, May I ask additional question?

    Please see the attached file.

    Q1~Q10  (I am Sorry many questions)

    6082.180912_Questions About 953&954 EVK.pdf

    # enable pat gen
    board.WriteI2C(0x30, 0xB0, 0x00)
    board.WriteI2C(0x30, 0xB1, 0x01)
    board.WriteI2C(0x30, 0xB2, 0x01) #enable pattern generator
    
    board.WriteI2C(0x30, 0xB1, 0x02)
    board.WriteI2C(0x30, 0xB2, 0x33) #8 color bars, block size of 5
    
    board.WriteI2C(0x30, 0xB1, 0x03)
    board.WriteI2C(0x30, 0xB2, 0x24) #CSI Data Identifier (0x24 = RGB888, 0x2C = RAW12, 0x2B = RAW10)
    
    board.WriteI2C(0x30, 0xB1, 0x04)
    board.WriteI2C(0x30, 0xB2, 0x16) #line size (15:8)
    
    board.WriteI2C(0x30, 0xB1, 0x05)
    board.WriteI2C(0x30, 0xB2, 0x80) #line size (7:0)
    
    board.WriteI2C(0x30, 0xB1, 0x06)
    board.WriteI2C(0x30, 0xB2, 0x02) #bar size (15:8)
    
    board.WriteI2C(0x30, 0xB1, 0x07)
    board.WriteI2C(0x30, 0xB2, 0xd0) #bar size (7:0)
    
    board.WriteI2C(0x30, 0xB1, 0x08)
    board.WriteI2C(0x30, 0xB2, 0x04) #active lines per frame (15:8)
    
    board.WriteI2C(0x30, 0xB1, 0x09)
    board.WriteI2C(0x30, 0xB2, 0x38) #active lines per frame (7:0)
    
    board.WriteI2C(0x30, 0xB1, 0x0a)
    board.WriteI2C(0x30, 0xB2, 0x04) #total lines per frame (15:8)
    
    board.WriteI2C(0x30, 0xB1, 0x0b)
    board.WriteI2C(0x30, 0xB2, 0x65) #total lines per frame (7:0)
    
    board.WriteI2C(0x30, 0xB1, 0x0c)
    board.WriteI2C(0x30, 0xB2, 0x0B) #line period (15:8)
    
    board.WriteI2C(0x30, 0xB1, 0x0d)
    board.WriteI2C(0x30, 0xB2, 0x93) #line period (7:0)
    
    board.WriteI2C(0x30, 0xB1, 0x0e)
    board.WriteI2C(0x30, 0xB2, 0x21) #vertical back porch
    
    board.WriteI2C(0x30, 0xB1, 0x0f)
    board.WriteI2C(0x30, 0xB2, 0x0a) #vertical front porch

    Thank you.

  • Hello,
    Q1: Yes, your calculation is correct

    Q2: Default N value (in register 0x07 of UB953) is 0x28. So calculation should give 25MHz not 35.7MHz

    Q3: It means UB954 is linked to UB953 on Port 0 and the FPD3_PCLK freq is 100MHz (4xREFCLK).

    Q4: BC data rate is 50Mbps (same as BC freq)

    Q5: DIV_N_VAL = 40 (0x28). Also, UB954 register 0x4C is important. Use this to select RX port to read or write.

    Q6: From script tab of ALP run (use the Run PreDef Script button on the scripting tab )
    "ovt_1280_1080_30fps_REMOTE_RevE2_ID7a.py" script from the following folder
    C:\Program Files (x86)\Texas Instruments\Analog LaunchPAD v1.57.0010\PreDefScripts\DS90UB954

    Now you should see the horizontal/vertical info correctly.

    Q7: Port Pass status is from UB954 register 0x4D bit 1. Please check Data Sheet.

    I will respond additional questions tomorrow.

    Thanks,
    Vishy
  • Hello,

    Q3: Also, I would like to explain,UB954 is linked to UB953 when corresponding RX port lock status (register 0x4D bit 0) is set to 1.

    Q8: CSI_STS Register (0x35) bit 1 (TX_PORT_SYNC) and bit 0 (TX_PORT_PASS) status are reflected under "Current CSI TX Status". 
    FPD Link error status are indicated by Parity Errs and Encoder Errs under "Current RX Port Status".

    Q9 :
    Horizontal represents the length of the most recent video line as read out from registers 0x75, 0x76
    Vertical represents the line count for the most recent video frame as read out from registers 0x73, 0x74
    EQ HI/Lo: Adaptive EQ Status from register 0xD3 is reflected here. Hi is bits 5:3 and Lo is bits 2:0
    S Filter: Controls the min and max values allowed for the clock to data sample timing. Please check the latest Data Sheet on the web.
    Lock Chg Cnt, Parity Errs: Please check register 0x4D. Bit 4 is LOCK_STS_CHG and bit 2 Parity Error detection flag. Parity error count is from registers 0x55 and 0x56
    Encoder Error: This flag is from register 0x4E bit 5.

    Q10:
    Please check
    e2e.ti.com/.../705925

    Thanks,
    Vishy

  • Hi Vishy

    I really appreciate it.

    I tried to do according to your advice.

    May I ask more questions about  Q6, Q9 and Q10?

    >>Q6: From script tab of ALP run (use the Run PreDef Script button on the scripting tab )

    >> "ovt_1280_1080_30fps_REMOTE_RevE2_ID7a.py" script from the following folder

    >> C:\Program Files (x86)\Texas Instruments\Analog LaunchPAD v1.57.0010\PreDefScripts\DS90UB954

    >> Now you should see the horizontal/vertical info correctly.

    As a result of turning the above script, the following contents are displayed.

    >*** Running ovt_1280_1080_30fps_REMOTE_RevE2_ID7a.py ***

    OVT10640 Reset

    CSI Error = 0xff →Errors has been detected.     ← It is OK?

    SENSOR Error = 0x0

    Packet Header data = 0x2c

    Packer Header Word Count 0 = 0x80

    Packer Header Word Count 1 = 0x7

    CSI Error = 0xff 

    Packet Header data = 0x2c  ← what does it mean?

    Packer Header Word Count 0 = 0x80  ← what does it mean?

    Packer Header Word Count 1 = 0x7  ← what does it mean?

    >>Q9

    When checking the communication status, following method is one of the correct method?

    (Please see attached file next page3.)

    >>Q10

    Is CMLOUT output waveform applied by equalizer or None equalized waveform?

    (Please see attached file page4.)

    181002_Questions2 About FPD-LinkIII EVM.pdf

    Thank you

  • Hello,

    Q6:

    >>>CSI Error = 0xff →Errors has been detected. ← It is OK?

    This is the read out of UB953 register 0x5C. Please check setup (board connection, jumpers, etc) and run again

    >>>Packet Header data = 0x2c  ← what does it mean?
    >>>Packer Header Word Count 0 = 0x80  ← what does it mean?
    >>>Packer Header Word Count 1 = 0x7  ← what does it mean?

    The script is a text file. You can see at the end (lines 1347-1349) it reads and prints out UB953 registers 0x61, 0x62 and 0x63. Please refer UB953 DS for register details. Also, note CSI data type is explained in UB954 data sheet.

    Q9:

    Yes using UB954 register 0x7D is good. Please check related discussion in UB954 data sheet section 7.5.9 (error handling).
    Also, you are right in understanding "Pass Sts" status bit functionality on the info page

    "Parity Errs" indicate result of FPD3 interface parity checking. Receiver will check FPD3 frame parity to detect errors on the received FDP3 frame. Parity error flag in RX_PORT_STS1 register is set once a programmed number of parity errors have been detected. Note when the PASS_PARITY_ERR control is set in the PORT_PASS_CTL register, the Receiver will clear the Pass indication on receipt of a parity error on the FPD3 interface. The valid frame counter will also be cleared on the parity error event.

    Q10:
    Is CMLOUT output waveform applied by equalizer or None equalized waveform?

    CMLOUT is after equalization. See UB954 DS section 7.4.10

    Thanks,
    Vishy