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DS90UB933-Q1: RX not LOCKED

Jesse Lee
Expert 1985 points
Part Number: DS90UB933-Q1

hello
I use XC7027 as ISP IC, which can only output 8bt or 16 bit data. 

I find that DS90UB933's register 0x0C's value is 0x05, which indicates that RX not locked.

what is the meaning of it?  what should i do to debug it?

and 934‘s PCLK just has a 60HZ square waveform,  could you give some comments on it ?

  • 0
    TI__Mastermind 30515 points

    Your information is too general, we need you check this issue more details:

    1. please make sure the system level design is correct:

    a. cable/connector can match UB933/UB934 request in d/s?

    b. UB934's mode setting is correct? please check it is RAW10 or RAW12 mode, which should be matched the ISP's output format (RAW10 is matched with 8bits output mode of ISP).

    c. UB933/UB934 external circuit design is correct? pls refer to TI's EVM refer. design.

    2. pls don't set the ISP after the power-on, does the UB934's LOCK pin is high or low? "high" means ub934 is locked. if it is high:

    a. pls check the PCLK of ISP's jitter spec., is it matched UB933's request in d/s?

    b. what is the setting of ISP? what is the PCLK? UB933 uses PCLK or external ref. as PLL's refercock (that is to say, what is the mode_sel setting of UB933)?

    if it is low:

    c. pls check the layout, power supply design, etc.

    d. pls check the connector and cable spec. carefully!

    regards,

    Steven 

  • 0 in reply to Steven(Shenzhen) Shi
    Expert 1985 points

    Thanks for your support!

    1.I post the PCBA circuit, and already checked it, which have no problem.

    I want to debug system one by one,  933 first, then for 934.

    can i debug the issue of 933's RX NOT LOCKED  seperatly from 934?? 

    whether the cable/connector you mentioned is used for connecting between 933 and 934?  

    If yes, so can i ignore the cable/connector spec or 934's status until i fix 933's issues?

    2. set 933 in External oscillator mode,  the external oscillator frequecy is 48MHZ,  and  the PCLK of ISP is 96MHZ for 933 PCLK input (pin 3).

    3. set 934 in RAW 10 bits mode

     

    I will check the 934's output status later, such as PASS, LOCK

    原理图0905.pdf

  • 0 in reply to Jesse Lee
    TI__Mastermind 30515 points
    The Rx lock status means the de-ser's lock status NOT UB933. it is not recommended to debug UB933 only.
    if you need check the UB933 is correct or not, if UB933 is set as PCLK mode, you can use scope to measure the PCLK and Rout signal together, are they synchronized? if NOT, it has issue!
    If yes, please check the transmission channel and de-ser.

    regards,
    Steven
  • 0 in reply to Steven(Shenzhen) Shi
    Expert 1985 points

    Thanks

    1. Set UB933 as PCLK mode ,  does it mean that PCLK from imager mode ??

    2. the PCLK and Rout signal ,  means the signal on  PCLK( pin 3)  and DIN[0:7] (Pin 19-24,26-27)???

    3. In UB933's register 0x0C, what is the meaning of PCLK Detect(bit 2), is the Pin 3's signal?

    and also about LINK Detect (bit 0)???

      the result is 1 means that FPD-Link III  has established?  If yes,  so both the connector and coax cable  spec is OK?

    4. can i set the 933/934 work in BIST mode, if 934 can generates correct image,  i could confirm that the whole 933/934 system is OK , such as harware and FPD-Link III ???

  • 0 in reply to Jesse Lee
    TI__Mastermind 30515 points
    1.yes, pls see UB933 datasheet on mode setting;
    2. yes.
    3. yes. link detect means the cable is detected but cable quality can't be detected.
    4.? if BIST can run up, it means the link between UB933 and UB934 is well.

    regards,
    Steven
  • 0 in reply to Steven(Shenzhen) Shi
    Expert 1985 points

    IF i want to set UB933 in PCLK mode, I must connect the External oscillator to ISP insted of UB933.
    Based on my circuit, maybe is is difficult to let External oscillator output to ISP.
    1. so can I use a frequency generator as ISP's reference clock?
    2. In PCLK mode, what is the PCLK frequency value for UB933 ？ and the External oscillator SPEC?

  • 0 in reply to Jesse Lee
    TI__Mastermind 30515 points
    1. yes, please note jitter spec. in ub933 d/s
    2. pls refer to UB933 d/s on the PCLK jitter spec. request.


    regards,
    Steven