• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 942 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

THS8200-EP: Dual image @ 20bit YPbPr 1080-50i to VGA (RGB HV ) conversion

Alaattin Karahan
Prodigy 120 points
Part Number: THS8200-EP
Other Parts Discussed in Thread: THS8200

I want to convert interlaced digital video to VGA to diplay on a VGA monitor. THS8200-EP do not gererate Vsync between odd and even fields when " dtg2_rgb_mode_on set as RGB mode" . So VGA monitor shows 2 squashed Picture vertically.

Can you send the register values for following formats?

20bit YPbPr 1080-50i to VGA (RGB HV )

and

10bit YPbPr SD  to VGA.

  • 0
    TI__Guru 62930 points
    Alaattin,
    Please see this post. It has link to software/tools to help determine various register settings based on configuration.
    e2e.ti.com/.../714394

    If this answers your question, please click "Verify it as the answer"
    Regards,
    Wade
  • 0 in reply to Wade Vonbergen
    Prodigy 120 points

    Hi,

    I checked the excell sheets for the resolution I requested, 1920x1080i 50Hz does not exist in the excell sheets "THS8200 - YCbCr 422 ES to VGA" and "THS8200 - YCbCr 422 DS to VGA"

    Best regards,

    Alaattin

  • 0 in reply to Alaattin Karahan
    TI__Guru 62930 points
    Alaattin,
    Unfortunately, we have very little expertise remaining with this device.

    However, I was able to get some feedback from somebody who was a little familiar with the device. Here are the suggestions.

    You might be able to get it working by setting the “dtg1_mode” register (= 0001) for the timing but leave the color space converter alone.

    Other possibilities are trying modifications to: dtg2_vlength1, dtg2_vdly1, dtg2_vlength2, dtg2_vdly2, dtg2_ip_fmt.

    Datasheet section 7.3.2 274M Interlaced (1080I) has register settings for 274M, but the timings might be good for VGA 1080i.

    Regards,
    Wade
  • 0 in reply to Wade Vonbergen
    Prodigy 120 points

    Thank you for you help Wade,

    Following register setting solved the issue

    "dtg2_ip_fmt: Interlaced/progressive-scan indicator
    {dtg2_line_cnt_msb 0x7F(7)}
    Indicates whether current video frame is progressive (0) or interlaced (1)"

    dtg2_line_cnt_msb ( 0x7F) = 0xD4

    Best regards,

    Alaattin