This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83822I: Questions about product specification

Part Number: DP83822I

Hi apps team,

Could you give me comments on the following customer questions?

Q1. The customer wants to replace PHY-A to DP83822I(PHY-B). But for the register 0x0001, bit [6], SMI preamble suppression, the default value is different from PHY-A (which value is '0') and PHY-B (which value is '1'). In that case, what restriction will happen for the link partner with DP83822 caused by the default value difference? Or there is not any restriction no matter what the default value is?

Q2. For the register 0x0018, bit[9,10], in the case that the customer sets 5Hz (100ms on-time, 100ms off-time) for example, and, LED_0 is set by BLINK for TX/RX Activity, what happen on the on-time if TX/RX activity happens during the on-time at the blink? For example, does taking the on-time longer than 100ms happen?

Q3. In the case that DP83822 is progressing reset sequence, what happen if receiving signal from the link partner? 

Q4. To confirm, is there any product specification, which requires software reset after hardware reset is completed, not described on the datasheet?

Thank you for your support. 

Best regards,

Takeshi Sasaki

  • Hello Sasaki-san,

    1. In customer's case, this feature will not affect DP83822 connection with Link Partner. SMI is the Serial Management Interface, meaning the MDIO MDC pins used for register access. SMI Preamble suppression is related to register access to the PHY from MAC. When a PHY supports SMI Preamble Suppression, it means that the PHY can accept MDIO Register Access Commands in which the preamble is not present. It will also accept MDIO Register Access Commands where preamble is present. If a PHY does not support SMI Preamble suppression, then it can accept MDIO commands only when a preamble is present.

    2. The LED blinking feature has been designed to account for continuous data transfer. When data transfer (TX or RX) occurs when the LED BLINK is ON, the LED Blinking will continue to operate at the rate selected in register 0x0018. If the rate is 100ms on and 100ms off, then it will not extended beyond 100ms.

    3. DP83822 will not initiate link up sequence untill its completely out of the reset sequence. If autonegotiation pulses are received from the Link partner when DP83822 is still in reset, then signals from Link partner will be ignored.

    4. There is no PHY requirement where are software reset is needed after a hardware reset.

    -Regards,
    Aniruddha