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TPD4S1394: can clamp pin left open?

user021864
Intellectual 2145 points
Part Number: TPD4S1394

Hi, 

My customer wonder if we can left the clamp pin open? 

I also wanna know what is the meaning of comparator trip interface? 

and what is the typical application circuit for this function.

Thanks for your help.

  • 0
    TI__Mastermind 32661 points
    The VCLAMP pin can be left open.

    The purpose of the pin was most likely to allow for a capacitance to be placed on this pin to support IEC ESD. Referenced capacitors can be used to improve IEC ESD performance within reference circuits. It was most likely not necessary to meet the target performance, so was removed from the datasheet.
  • 0 in reply to Chuck Branch
    TI__Intellectual 2145 points

    Hi, 

    Thanks for your comments.

    The other question from customer is:

    We have a concern about power up, where BUS_POWER might be already 12V while 3V3 ramps up. What will be the behaviour of the IC ? We want to be sure there won’t be any glitch on Firewire power supply control at boot (it could cause detection issues ?). Can you ask TI state of FWRPWR_EN pin and late Vg detection when VCC is not within recommended range yet ? In doubt, we can add a BOM option to supply tpd4s1394 with 3V3SB (or 3V3dual), because this rail will be up before the 12V (BUS_POWER).

    Can you help on this? 

    Thanks for your help.

  • 0 in reply to user021864
    TI__Mastermind 32661 points
    The device will enable based on the 3V3 supply rail independent of the 12V rail, so once the 3V3 rail has risen above 3V and the protection delay has passed.

    As long as 3V3 is guaranteed to lag 12V, I don't see any system issue.