Part Number: TPS65986
From prior post, it is understood that when device is in SLEEP, we need to wait for 48M Osc to become stable before getting switched and able to recognize I2C commands. It was empirically determined that 1ms delay between I2C attempts was sufficient to allow that to happen. My customer implemented this along with a number of retries, but is now seeing successive NACK's, up to 3 NACKs before waking. Is there potentially a period of time required to enter SLEEP mode, before it would be woken-up by an I2C write? In other words, if the first I2C write attempt occurred right as the device starts to enter SLEEP, is there a period of time during SLEEP entry where it would not recognize or react to any I2C writes? If so, can we quantify that time, so they can determine the max worst-case time period for the device to Enter and Exit SLEEP mode? Thank you.
