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DS90UB925Q-Q1: General questions about the Serializer and Deserializer when used as an interface for a remote radio tuner.

Part Number: DS90UB925Q-Q1

Hello,

I am evaluating the serializer/deserializer for an interface to an external radio tuner system providing an interface for command/response, I2S audio, and AM/FM/DAB IQ.  I have quite a few question after reading the datasheet that I'm looking to clarify in order to be confident the system will work as expected.

  • Serializer: What is the input capacitance of the I2S pins?
  • Serializer: What is the input capacitance of the DIN pins?
  • Can the link operate properly without a HS/VS/DE signal input toggling at the appropriate 130 PCLK ratios?
  • There is a note in the serializer Datasheet that “Note: The bit rates of any I2S bits must maintain one fourth of the PCLK rate.”
    • Does this imply the I2S must be synchronous with the PCLK?
    • If we intend to send both I2S and IQ are we violating this requirement?
      • 48 ksps I2S = 1.536 MHz I2S CLK
      • 744ksps -> 2048ksps IQ = 11.904 MHz -> 40.960 MHz PCLK
  • What is the maximum size for a single I2C write transaction (bytes between start and stop), when sent over the control channel?
  • What is the maximum size for a single I2C read transaction (bytes between start and stop), when sent over the control channel?
  • Can the I2C transaction be configured to match our expected format for the devices?  The write seems to be fine, but the read has an empty write beforehand as shown…and we would provide the NACK at the end rather than the ACK as shown.

  • Requirement for I2C with my devices:

  • Would it be possible to get an idea on volume pricing for the serializer / deserializer?

Thanks.

  • Shawn,
    Please give us some time to review your questions in detail and provide you a response.
    For pricing information please contact your TI Sales person.
  • Hello,

    1. We do not characterize input capacitance for I2S and DIN pins, but in general it should be between 4pF to 8pF.
    2. The link can operate without HS/VS/DE signals if you don’t care about video blanking. I assume you will not be sending any video data right?
    1. Your intended use case should work. I2S doesn't have be to synchronized with the PCLK. Please take a look at this application note for more detailed I2S implementation. http://www.ti.com/lit/an/snla221/snla221.pdf
    1. The FPDlink IC simply forwards I2C data over control channel in your case. There's no restriction on the max read/write size. You should check the restriction on the connected I2C master/slave device, and they must support clock stretching.
    2. This format is supported. The FPDLINK IC will send I2C transactions in this format as long as the I2C master and slave are sending transactions in this format.

    Best Regards,

    Charley Cai