1) Questions about Fiber Signal Detect function of Pin 24 (LED_1/GPIO1/SD)
On page 40 of the datasheet, under the Note we read:
On page 48 we see:
From this information, we put inverters on the board to invert the signal detect from the SFF. However, then I noticed this on page 78:
We are having trouble getting the 100Base-FX modules to link, and need to know the correct polarity of "SD".
2) Questions about polarity of SD_EN:
On Page 40 we see:
and on Page 48 we see:
However, on page 78 we see this:
Which is opposite from the previous two notes. Please let us know the correct setting for SD_EN.
3) We are also having trouble interpreting the following statement on page 40:
We don't understand what "electrical link ... is broken" means. Since this signal is a logic level, it can be high or low whether the electrical link is present or not?
Under what conditions will the PHY need to be soft reset? Is this any time the fiber is disconnected?
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