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DP83867E: Strap configuration and Unused Pins treatment

Genius 4810 points
Part Number: DP83867E

1.

Question about Strap configuration in datasheet page36:

When they use this part at SGMII

My understanding is they should use Rhi = 4 kΩ and Rlo = 10 kΩ on RX_D0 and RX_D1 , RX_D2 and RX_D3.

Is my understanding correct ?

In this case ,do these resisters affect to diffrential signal ? If you hane recommend layout pattern of these resisters ,please let us know it ?

2.

Question about  description of Unused Pins in datasheet page8:

Which(A or B) below description is correct ?

A:

“Even though a device may have internal pullup or pulldown resistors, a good practice is to terminate unused

inputs rather than allowing them to float.”

B:

“Except for VDDA1P8 pins, if they are not used then they should be left floating.”

 

If A is correct, should pin of Type: PD or PU be connected directly to VDD or GND ?  

When they don’t use INT / PWDN, please let us know pin treatment.

Regards,

 

  • Hi,

    1. Yes, this is correct and inline with data sheet recommendation. Additional straps are recommended to keep the differential signal balanced.

    2. Device has internal PU/PD of 9k , hence can be left floating. However if you want to be have extra safety on design, you can always have external PU/PD. Hope this is clear. You can use PU/PD thru 2.2K resistor.

    3. Connect to external VDDIO thru 2.2K as recomended in data sheet.

    Regards,
    Geet
  • Closing this thread. In case you need further assistance, please open new thread and refer to this link.

    Regards,
    Geet