DS90UB934-Q1: DS90UB934 问题

Hi, what is your question here? BIST test issue or link set-up issue? the I2C can be assessed?

regards,
Steven

yes, it right.
for BIST setting and status, you can check d/s page28, with the internal clock mode, you can change the freq. by setting 0xB3 based on d/s description.

The BIST mode is enabled by BIST configuration register 0xB3. The test may select either an external PCLK or
the internal oscillator clock (OSC) frequency in the serializer. In the absence of PCLK, the user can select the
internal OSC frequency at the deserializer through the BIST configuration register. When BIST is activated at the
deserializer, a BIST enable signal is sent to the serializer through the back channel. The serializer outputs a
continuous stream of a pseudo-random sequence and drives the link at speed. The deserializer detects the test
pattern and monitors it for errors. The serializer also tracks errors indicated by the CRC fields in each back
channel frame. While the lock indications are required to identify the beginning of proper data reception, for any
link failures or data corruption, the best indication is the contents of the error counter in the BIST_ERR_COUNT
register 0x57 for each RX port.
The clock frequency that is output onto the PCLK pin during BIST mode is based on an internal FPD-Link III
clock, and may not match the expected PCLK coming from the serializer.


best regards,
Steven