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Original question:

DP83867IR: back to normal process after WOL

DP83867IR: back to normal process after WOL

K.Hamamoto
Guru 12155 points
Part Number: DP83867IR


Hi Aniruddha,

I post same question related the last question.

The customer confirmed "Wake-up" at Magic Packet reception, but the status is not the expected value.
 
<Acquisition Result of the register in WOL Interrupt Processing>

① The result of reading the ISR register is "0x0000"
⇒ ISR register Bit 3: WOL_INT does not become "1"
② After executing ①, the reading result of the RXFCFG register is "0x1181", the reading result of the RXFSTS register is "0x001c"
⇒ RXFSTS register Bit 0: MAGIC_RCVD does not become "1"
③ In WIP_INT is not "1", but after setting the RXFCFG register WOL_OUT_CLEAR → "1"
Read result of RXFCFG register is "0x1181", reading result of RXFSTS register is "0x0000"

Why those register is not expected value? Should we do any other setting ?

Best Regards,
Koji Hamamoto

  • 0
    TI__Mastermind 23675 points
    Hi Hamamoto-san,

    Please tell me how you are configuring the device for Magic Packet.
    What are the registers you are configuring for the MAC address and the values.
    From the register reads, the PHY is not detecting a Magic Packet, but it is detecting broadcast/unicast frames.
  • 0 in reply to Ross Pimentel
    Guru 12155 points
    Hi Ross-san,

    I am sorry for the delay in my response.
    The following is the configuration process.

    1) RXFCFG register
    WOL_OUT_MODE set to "1"
    ENHANCED_MAC_SUPPORT set to "1"
    WAKE_ON_MAGIC set to "1"

    2)MICR register
    WOL_INT_EN set to "1"

    then CPU move to suspend.

    Best Regards,
    Koji Hamamoto
  • 0 in reply to K.Hamamoto
    TI__Mastermind 23675 points
    Hi Hamamoto-san,

    You also need to configure registers 0x136 to 0x138 with the local MAC address.
    Without the MAC address, the PHY assumes the MAC address is 00-00-00.
    Please see the DP83822 app note on configuring the MAC address:
    www.ti.com/.../snla261.pdf
  • 0 in reply to Ross Pimentel
    Guru 12155 points
    Hi Ross-san,

    Thank you for your reply.
    In this case, our considering device is DP83867. As you mentioned above, we can refer same as DP83822 about MAC address? Is that correct?

    Best Regards,
    Koji Hamamoto
  • 0 in reply to K.Hamamoto
    TI__Mastermind 23675 points
    Please use the example of the DP83822 WoL app note to help you understand how to configure Magic Packet.
    However, the actual register address is different from DP83822 to DP83867.
  • 0 in reply to Ross Pimentel
    Guru 12155 points

    Hi Ross-san,

    I am sorry for the delay in my response.
    They had confirmed the register of 0x0136~0x0138.
    0x0136 : 0x2202
    0x0137 : 0x4433
    0x0138 : 0x6655
    (MAC: 02:22:33:44:55:66)

    However it does not change anything. What should we confirm next?

    Best Regards,
    Koji Hamamoto

  • 0 in reply to K.Hamamoto
    Guru 12155 points

    Hi Ross-san,


    Could you support this post?

    Best Regards,

    Koji Hamamto

  • 0 in reply to K.Hamamoto
    Guru 12155 points

    Hi Ross-san,

    I referred the App Note of DP83822. The MAC address to register set at the address 04A2 to 04A4.

    On the other hand,for DP83867 the address is 0136 to 0138. Is that correct?

    On the customer board, they registered as the following.

    (MAC: 02:22:33:44:55:66)

       0x0136 : 0x2202
       0x0137 : 0x4433
       0x0138 : 0x6655 

     However it does not still work. What should we do next ? 

    (In addition, the register of 0x0135 was "0x001c" )

    If you would like to know the other register setting , I can send that setting information on the private message.

    Best Regards,

    Koji Hamamoto

  • 0 in reply to K.Hamamoto
    TI__Mastermind 18425 points
    Hello Hamamoto-san,

    A couple of follow up questions,

    Are you configuring INT/PWDN pin to be interrupt output? This pin is Power Down Input pin by default. This can be changed via bit 7 of register 0x1E.

    Are you using byte-aligned magic packets?

    -Regards,
    Aniruddha
  • 0 in reply to Aniruddha Khadye
    Guru 12155 points
    Hi Aniruddha-san,

    Thank you for your support.

    >Are you configuring INT/PWDN pin to be interrupt output? This pin is Power Down Input pin by default. This can be changed via bit 7 of register 0x1E.

    The register of 0x001E(CFG3) is 0x0002. Should we set bit 7 of CFG3 to "1" ?

    >Are you using byte-aligned magic packets?

    We need check it just in case. However what happen if they do not use the byte-aligned magic packet?

    Best Regards,
    Koji Hamamoto
  • 0 in reply to K.Hamamoto
    TI__Mastermind 18425 points
    Hamamoto-san,

    Yes, change bit 7 of register 0x1E to configure INT/PWDN pin as interrupt output.

    If the magic packet is not byte aligned then the magic packet feature cannot be used.

    -Regards,
    Aniruddha