Other Parts Discussed in Thread: TS5MP646
Hello guys,
In our current project, we are using TS5MP646 MIPI switch in combination with two DS90UB960-Q1 FPDLink III deserializers.
We are currently in the phase of PCB design. Consequently, I would like to ask you about the constraints I need to respect in order to have fully functional board:
- what is allowed length for RIN +/- pairs as well as MIPI CSI-2 pairs,
- what is allowed difference in length between two wires of differential pair
- any paricular constraint for MIPI CSI-2 clock outputs...
Is there any document or design guide that can be useful for us?
Thanks in advance for your time and effort.
Sincerely,
Bojan.
