TUSB542: 1.8V Decoupling and Power Capacitors and PCB Symbol

user5303907

Part Number: TUSB542

Hi,

I have noticed that there is no requirement of power supply decoupling and input caps on the TUSB542 datasheet. The example application doesn't show them either. Pin assignment of VDD18 (Pin 5) is not a convenient location to place decoupling and input caps. Does that mean this device doesn't require caps at the 1.8V rail? Is there any reason for that?

I have also run the.bxl file to get PCB symbol and footprint. I have noticed that the schematic symbol have RX pair and TX on swapped. On datasheet the pin top view shows RX(+/-) on Pin 18/17; TX(+/-) on Pin 15/14. But on the schematic symbol, Pin 18/17 are named as Tx(+/-); 15/14 as Rx(+/-). The direction of each pair on the symbol matches the description in the datasheet though. I just want to confirm which is right. And you may want to correct the name on the PCB symbol file.

Thanks,

over 6 years ago

0 David (ASIC) Liu over 6 years ago

TI__Guru**** 158546 points

I would put one 1uF and one 100nF power decoupling caps on the 1.8V power supply.

What do you mean by input caps, do you mean AC coupling caps on the input of TUSB542?

For the pinout, please follow the TUSB542 datasheet. We need to correct the symbol file.

Thanks
David

0 user5303907 over 6 years ago in reply to David (ASIC) Liu

Prodigy 55 points

Here is my PCB layout around VDD1P8. The 100nF capacitor is placed on the same layer of the device, in between a RX differential pair and TX one (highlighted in transparency). It is about 4W away from TX and RX. I will need to drill a via close to this cap to my GND plane.

My concern is : is it going to impact the USB3 signals SI by placing a decoupling cap so close to high speed signal. Should I flood the open area with GND to isolate the EM field.

I will have to place the 1uF to the bottom layer through a VIA based on the spacing issue shown as below. Would that also be a problem? Thanks,

0 David (ASIC) Liu over 6 years ago in reply to user5303907

TI__Guru**** 158546 points

I will put both 100nF and 1uF on the bottom layer underneath TUSB542 , the 100nF needs to be placed as close to TUSB542 as possible, and 1uF can be placed away from the TUSB542.

Thanks

David

0 user5303907 over 6 years ago in reply to David (ASIC) Liu

Prodigy 55 points

Thanks, David

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TUSB542: 1.8V Decoupling and Power Capacitors and PCB Symbol