Dear team
It is a mass production project, currently line down because the detection issue, sometimes the system can not identify the PCIE device when power up.
so we would like to know, if there have some process to locate the root cause if the system can not identify our device? might be the power up initial sequence have some problem?
we have a cross check, like good device to bad board and bad device to good board, find the issue is related with the chip.
Thanks.
Jun Shen
Jun,
See my notes below.
1. We find a E2E post say there do not need power sequence for this chip.
- My apologies I was referring to the reset requirement stated in section 2.5 of the datasheet. your second point answers my question.
2. We checked the reset is after the power and clock stable, around 900ms delay after the power and clock good.
- Am I correct in assuming this check was done for both good and bad boards?
3. The bad device move to good board, the issue is still there, so the issue is following the device.
- Understood
4. The PCIE is always connected, the whole system have power cycle, sometimes the PCIE work, sometimes not.
- Understood
5. The bad board can some time work properly. Failure rate is calculating.
6. This project have mass production for 10 years, nothing changed, only this time have this issue. Seemed the system cannot be linked, we find the PHY_STATUS is different between good board and bad board.
- What difference do you see on the PHY_STATUS and when?
Because XIO1100 is a PHY, and there have a MAC in the FPGA, so is there some guide about the flow of how the operation system find a PCIE device ? or is there some test step to identify why the OS cannot find a PCIE device? Thanks for your help.
- The Link Training and Status State Machine (LTSSM) is described in the Section 4, Physical Layer Specifications, of the PCI Express Base Specification Revision 1.1. See below for the overall LTSSM diagram. As a next step I would investigate if the receiver detection of XIO1100 is completed (See section 2.6 of datasheet) via RX_STATUS. Does XIO1100 see the PCIE device receiver? This directly impacts the detect state. Also please try multiple PCIE devices, if possible and if you have not tried already, to eliminate the possibility of one faulty PCIE device.
