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SN65DSI83-Q1: Disable DEN

Part Number: SN65DSI83-Q1

To whom it may concern,

Our MIPI source is able to disable the Data Enable (DEN) signal from the video packets, however when we attempt to do this and present the MIPI data without DEN to the SN65DSI83-Q1 bridge, we still that the converted LVDS is toggling the DEN.

Does the bridge support disabling the DEN signal from the LVDS data?  If so, how do we disable it?

Look forward to your response,

Many Thanks,

Bhav

  • Hi Bhav,

    I don't believe there's a way to disable DEN on the bridge. According to the datasheet, DE is always asserted when active pixel data is transmitted on the LVDS side, with the polarity being set by bit 7 in register 0x18.

    Is there a particular reason you want to disable the DEN signal? I've yet to see any LVDS displays that work without this signal.

    Regards,
    I.K.
  • Hi I.K,

    Thanks for your prompt response.

    Our SW team are having issues in getting flicker-free display on the LCD in DEN mode.

    This display however, supports another mode called ‘Sync Mode’ which does not use the DEN signal, and when DEN is isolated from the row/column drivers it defaults to sync-mode and flicker-free operation is achieved.

    Hence, if we can disable DEN or drive it low permanently in SW, it would prevent a HW change.

    Is there perhaps a way the bridge can be tricked into having the DEN permenantly de-asserted?

    Many Thanks,

    Bhav

  • Hi Bhav,

    Unfortunately I don't think that's possible with this device. However, it's possible the flicker isn't related to DEN, as I haven't seen any issues with DEN before with these devices.

    Here are somethings to check:
    1. Are you implementing the initialization sequence as presented in the datasheet correctly?
    2. Are you able to get the test pattern to display correctly without any flickering?
    3.Can you share the DSI83 register configuration and display datasheet? Perhaps there's a line time mismatch.

    Regards,
    I.K.