TL16C752D: Difference between TL16C752B and TL16C752D

Hello Bobby,

I have a question.
Please let me know your opinion. Is following code able to run at TL16C752B?

=====

Transmission request reception routine
{
1) Add the transmission data string to the internal transmission queue.
2) Disable THRE at IER.
3) Allow THRE at IER.
(THRE interrupt is generated if this is EMPTY)
}

Interrupt routine
{
case THRE interrupt:
1) Extract one character of transmission data from the internal transmission queue.
2) Write transmit data to THR.
(The next transmission data is transmitted at the next THRE interrupt)
}

=====

Regards,
ACGUY

Hey ACGUY,

I am assuming your transmission request reception routine involves looking at the MSR first to look for a change in state of either DSR or CTS. If the logic is correct then you would initiate the routine.

In your step 2 and 3, you disable the IER for the THR flag and then reinitiate it. Is there any reason why you disable it first? Presumably the THR flag should be disabled before the transmission request to avoid turning on the interrupt routine prior.

After step 3 is complete, INT should flag itself because the THR is empty. The interrupt routine then starts and you send a byte into THR. After this though, the device will send the data through serial but the INT will trigger again because THR is empty again. At this point your code would likely loop itself because it wil try to service the interrupt. You would need to include a step 3 to your interrupt routine to disable THR in IER to avoid the loop.

This is what I believe will happen, I can try to set this kind of code up tomorrow on my board and verify this is what happens.

Thanks,

-Bobby

Hello Bobby,

Thank you for your cooperation. I looking forward update from you.

Best regards,
ACGUY

Hello ACGUY,

I've replied back to your question in my last post. If you have any questions on my reply, let me know.

Thanks,
-Bobby

Hello Bobby,

Can I ignore items without regulation?
-------------------------------------------------------------------- ----------
General White 1
• Address setup time
TL16C752B: tsu1 (min) 0 ns
TL16C752D: No regulation

· IOW delay from chip select
TL16C752B: td 5 (min) 10 ns
TL16C752D: No regulation

• Address setup time
TL16C752B: No regulation
TL16C752D: t6s (min) 10 ns
-------------------------------------------------------------------- ----------
General White 2
Address hold time
TL16C752B: th4 (min) 0 ns
TL16C752D: No regulation

· Chip select hold time from IOW
TL16C752B: th2 (min) 0 ns
TL16C752D: No regulation

Address hold time
TL16C752B: No regulation
TL16C752D: t6h (min) 7 ns
-------------------------------------------------------------------- ----------
General Read 1
• Address setup time
TL16C752B: tsu1 (min) 0 ns
TL16C752D: No regulation

IOR delay from chip select
TL16C752B: td1 (min) 0 ns
TL16C752D: No regulation

• Address setup time
TL16C752B: No regulation
TL16C752D: t6s (min) 10 ns
-------------------------------------------------------------------- ----------
General Read 2
Address hold time
TL16C752B: th4 (min) 0 ns
TL16C752D: No regulation

· Chip select hold time from IOR
TL16C752B: th1 (min) 0 ns
TL16C752D: No regulation

Address hold time
TL16C752B: No regulation
TL16C752D: t6h (min) 10 ns
-------------------------------------------------------------------- ----------

Regards,
ACGUY

Hello Bobby,

Thanks for always helping me out.
I am not familiar with programming.
Can you tell me the points to be corrected in the transmission routine below?
An example sentence is OK.

=====

Transmission request reception routine
{
1) Add the transmission data string to the internal transmission queue.
2) Disable THRE at IER.
3) Allow THRE at IER.
(THRE interrupt is generated if this is EMPTY)
}

Interrupt routine
{
case THRE interrupt:
1) Extract one character of transmission data from the internal transmission queue.
2) Write transmit data to THR.
(The next transmission data is transmitted at the next THRE interrupt)
}

=====

Regards,
ACGUY

Hey ACGUY,

I can check for you what happens if you disable THRE in IER and then enable it (see if this will immediately generate an INT) but can you tell me which device you are asking about? B version or D version?

My guess is when you enable THRE at IER the INT pin should trigger, you will generate an interrupt but your code will get you stuck in a loop where you won't stop sending data because after each byte sent through TX, the THRE will be empty again and the INT will trigger. <-- if this is what you ARE trying to do then this routine should work. I can verify this for you if you let me know which version of the device you are asking about.

Thanks,

-Bobby

Hello Bobby,

I'd like to chage the device from B-version to D-version.
It collects information necessary for changing to D-version.
Please tell me which points to modify to change to D-version.

Regards,
ACGUY

I appreciate your cooperation. I respect TI engineers.

Many thanks and best regards,
ACGUY