Hello
I have a question regarding HW configurations reading (strap options) for the DP83620 Ethernet PHY.
According to the datasheet the configuration pins (strap options) are sampled at power-up or hard reset.
My question is, if these pins are sampled at release off the PWRDWN pin (pin 7) too, or is the pins only sampled at a "real" power-up?
Best regards
Niels Ole Jørgensen
DEIF A/S
