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TCA9548A: I2C Clock Speed Limitation

Part Number: TCA9548A
Other Parts Discussed in Thread: TCA9406, CD4097B, TS3A5017, TMUX1208

Hello, 

Max I2C clock is specified as 400kHz.  What is the limiting factor here?

For example, can the TCA9548A be clocked and configured at 400kHz, and then I2C master be reconfigured for 800kHz to control higher speed slaves (not the TCA9548A)?

  • Hey Keith,

    This device was designed for standard mode (100kHz) and fast mode (400kHz). The limiting factor here is the digital logic was never designed to work for fast mode plus (1MHz or 800kHz in your case).

    "For example, can the TCA9548A be clocked and configured at 400kHz, and then I2C master be reconfigured for 800kHz to control higher speed slaves (not the TCA9548A)?"

    I've never experimented with this but I assume this could glitch the device (and other slaves which only run at 400kHz max).

    Are you using a I2C switch because you are seeing address conflicts? We may be able to use a level translator to disable/enable any slaves that run at a maximum of 400kHz from those which run at 1Mhz (800kHz).

    Thanks,

    -Bobby

  • Hi Bobby, Yes I am using the TCA9548A to resolve address conflicts on the same I2C bus. Can you find out the response of the TCA9548A in the above use case by reconfiguring the bus clock after configuring the TCA9548A? All devices can run at I2C clock speeds greater than 400kHz, except this TCA9548A device.
  • Hey Keith,

    I will look into this for you. Currently I do not have a master/driver that does fast mode plus so I will need to find a way to do this. I may try to do this through simulation and see if this is caught in simulation.

    Thanks,
    -Bobby

    Edit: Discussed with one of our engineers who stated this is an undefined condition. Testing for this is difficult (could be a specific packet of data that could be misinterpreted but there are 2^8 possible combinations from just the first byte of data using 2 bytes would result in 2^17). The device WILL try to sample data if it sees a start condition followed by clock pulses. It could be possible a certain packet of data at 800kHz could be interpreted as the device's address and proceed to write/read.

    The only solution I could think of for you would be to use something like TCA9406 and use the enable pin to enable and disable the device like a switch. The other option is to find a GPIO controlled MUX.

  • Thanks Bobby.  That sounds like a reasonable outcome if overclocked.  

    Can you recommend any dual 1:8 mux that will run on 1.8V?  That are no larger than the TCA9548A.  The TCA9406 really isn't function equivalent to the TCA9548A.  

    Thanks,

    Keith

  • Hey Keith,

    I specialize in I2C devices and not as familiar with our GPIO controlled MUXes. I will internally assign this thread to one of our experts in MSS (multiplexers and signal switches) who will be able to provide you with better support.

    Thanks,
    -Bobby
  • Keith,

    We have 2-channel 8:1 switches (CD4097B) and 2-channel 4:1 (TS3A5017) switches but they need more that 1.8 V supply voltage. Are you able to use 3.3 V supply?

    We have a new device TMUX1208 which is 1-channel 8:1 that will operate down to 1.08V supply. Are you able to use a one channel switch and to multiplex the data path and connect the clock directly to the slaves from the master? The 2-channel version of this device will only be in 4:1 configuration not 8:1.

    Thank you,
    Adam