• State Resolved
  • Locked Locked
  • Replies 6 replies
  • Subscribers 33 subscribers
  • Views 583 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB964-Q1: Multi External FrameSync Control

Nao
Genius 4905 points
Part Number: DS90UB964-Q1
Other Parts Discussed in Thread: ALP

Hi, E2E members

Our customer is considering the following setting.
Can we use multi external framesync control?

Regards,

Nao

  • 0
    TI__Mastermind 30515 points
    Nao,
    Yes it can work in some extends as the four channel framesync. can be transmitted in the GPIO pins respectively. my question is that why need 4 diff. framesync.? the latency can be tolerated? the frame sync. cycle is different?

    best regards,
    Steven
  • 0 in reply to Steven(Shenzhen) Shi
    Genius 4905 points
    Hi, Steven

    Thank you for your quick reply.
    I will ask our customer your questions.

    Can I get how to set for this scenario?
    Please give me ALP script of this scenario, if possible.

    Regards,
    Nao
  • 0 in reply to Nao
    Genius 4905 points
    Hi, Steven

    I can get the feedback about your question from my customer.

    1. why need 4 diff. framesync.?
    Their product needs 4 diff camera modules.

    2. the latency can be tolerated?
    Yes.

    3. the frame sync. cycle is different?
    Main CPU requests each cameras on demand.
    The cycle is...
    request to camera 1 -> get the frame from camera 1 -> request to camera 2
    -> get the frame from camera 2 -> ..... -> get the frame from camera 4

    Is there a problem?

    Regards,
    Nao
  • 0 in reply to Nao
    Genius 4905 points
    Hi, Steven

    Do you have any update?

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 30515 points
    Hi Nao,
    You can set UB964's GPIO as input and GPIO of UB933 as output . the detailed setting can be referred in d/s on back channel GPIO description (reg. 0x6E and 0x6F), code can be referred as below:

    WriteI2C(0x4C,0x01) # RX0 --selecting channel
    WriteI2C(0x6E,0x00) # BC_GPIO_CTL0: UB964's GPIO0 is mapped to UB933's GPIO0/1
    WriteI2C(0x4C,0x12) # RX1 --selecting channel
    WriteI2C(0x6E,0x11) # BC_GPIO_CTL0:UB964's GPIO1 is mapped to UB933's GPIO0/1
    WriteI2C(0x4C,0x24) # RX2 --selecting channel
    WriteI2C(0x6E,0x22) # BC_GPIO_CTL1:UB964's GPIO2 is mapped to UB933's GPIO0/1
    WriteI2C(0x4C,0x38) # RX3 --selecting channel
    WriteI2C(0x6E,0x33) # BC_GPIO_CTL1: UB964's GPIO3 is mapped to UB933's GPIO0/1



    best regards,
    Steven
  • 0 in reply to Steven(Shenzhen) Shi
    Genius 4905 points
    Hi, Steven

    Thank you for your feedback.
    I will check it and rise new thread if I have more questions.

    Regards,
    Nao