DP83867IS: my phy don't generate sgmii output clock

Hi Gleb,

No, it is not normal for the SGMII SOCLK to turn off after 3 seconds.

There may be a problem with your PHY being reset, or an MDIO/MDC command being sent to the PHY that disables the clock.

Are you using the write with no post increment option? I would suggest not using post increment.

Best Regards,

I use tis algorithm from datasheet to read and write:

8.4.2.1.7 Example of Read Operation Using Indirect Register Access

Read register 0x0170.

1. Write register 0x0D to value 0x001F.

2. Write register 0x0E to value 0x0170

3. Write register 0x0D to value 0x401F.

4. Read register 0x0E.

The expected default value is 0x0C10.

8.4.2.1.8 Example of Write Operation Using Indirect Register Access

Write register 0x0170 to value 0x0C50.

1. Write register 0x0D to value 0x001F.

2. Write register 0x0E to value 0x0170

3. Write register 0x0D to value 0x401F.

4. Write register 0x0E to value 0x0C50.

This is listing of all registers of phy ( all numbers in file is in hexademical )

sgmii: 3 reg: 8 value: 6001
sgmii: 3 reg: 9 value: 300
sgmii: 3 reg: a value: c00
sgmii: 3 reg: b value: 0
sgmii: 3 reg: c value: 0
sgmii: 3 reg: d value: 401f
sgmii: 3 reg: e value: 4000
sgmii: 3 reg: f value: 3000
sgmii: 3 reg: 25 value: 400
sgmii: 3 reg: 2d value: 0
sgmii: 3 reg: 31 value: 10b0
sgmii: 3 reg: 32 value: d3
sgmii: 3 reg: 33 value: 0
sgmii: 3 reg: 37 value: 0
sgmii: 3 reg: 43 value: 7a0
sgmii: 3 reg: 55 value: 0
sgmii: 3 reg: 6e value: 803
sgmii: 3 reg: 6f value: 50
sgmii: 3 reg: 71 value: 0
sgmii: 3 reg: 72 value: 0
sgmii: 3 reg: 86 value: d7
sgmii: 3 reg: d3 value: 4000
sgmii: 3 reg: e9 value: 9f22
sgmii: 3 reg: fe value: e721
sgmii: 3 reg: 134 value: 1000
sgmii: 3 reg: 135 value: 0
sgmii: 3 reg: 136 value: 0
sgmii: 3 reg: 137 value: 0
sgmii: 3 reg: 137 value: 0
sgmii: 3 reg: 138 value: 0
sgmii: 3 reg: 139 value: 0
sgmii: 3 reg: 13a value: 0
sgmii: 3 reg: 13b value: 0
sgmii: 3 reg: 13c value: 0
sgmii: 3 reg: 13d value: 0
sgmii: 3 reg: 13e value: 0
sgmii: 3 reg: 13f value: 0
sgmii: 3 reg: 140 value: 0
sgmii: 3 reg: 141 value: 0
sgmii: 3 reg: 142 value: 0
sgmii: 3 reg: 143 value: 0
sgmii: 3 reg: 144 value: 0
sgmii: 3 reg: 145 value: 0
sgmii: 3 reg: 146 value: 0
sgmii: 3 reg: 147 value: 0
sgmii: 3 reg: 148 value: 0
sgmii: 3 reg: 149 value: 0
sgmii: 3 reg: 14a value: 0
sgmii: 3 reg: 14b value: 0
sgmii: 3 reg: 14c value: 0
sgmii: 3 reg: 14d value: 0
sgmii: 3 reg: 14e value: 0
sgmii: 3 reg: 14f value: 0
sgmii: 3 reg: 150 value: 0
sgmii: 3 reg: 151 value: 0
sgmii: 3 reg: 152 value: 0
sgmii: 3 reg: 153 value: 0
sgmii: 3 reg: 154 value: 0
sgmii: 3 reg: 155 value: 0
sgmii: 3 reg: 156 value: 0
sgmii: 3 reg: 157 value: 0
sgmii: 3 reg: 158 value: 0
sgmii: 3 reg: 159 value: 0
sgmii: 3 reg: 15a value: 0
sgmii: 3 reg: 15b value: 0
sgmii: 3 reg: 15c value: 0
sgmii: 3 reg: 15d value: 0
sgmii: 3 reg: 15e value: 0
sgmii: 3 reg: 15f value: 0
sgmii: 3 reg: 161 value: c
sgmii: 3 reg: 16f value: 95
sgmii: 3 reg: 170 value: c0d
sgmii: 3 reg: 172 value: 0
sgmii: 3 reg: 180 value: 752
sgmii: 3 reg: 1a7 value: ef20

One more. if I set low level, then wait and set hight level on RESET_N or INT / PWDN pin, the phy will make a reset, and after that link to other phy ( connected by rj45 wire ) , but all mdio - readable registers will read as 0x0000.

Hi Gleb,

From the registers you have given me, I see your RX_CTRL is not strapped to mode 3 as required in the DP83867. You should strap to mode 3, or perform the work around documented in the datasheet table 6 notes.

If you perform the work around of setting register 0x31bit[7] = 0, then the link must be restarted by disconnecting the cable and reconnecting it, or restarting auto-negotiation.

If you do not set RX_CTRL to mode 3, then SGMII can behave erratically.

And for the item of the MDIO registers reading all 0 after PWDN/RESET is toggled. You may be strapping to a different PHY address. If the MAC connected to the PHY is driving the RX_D pins in any way, the PHY address could be changed.

Do you have a schematic I could view?

Best Regards,

Hi Gleb,

Great. Thanks for the update. I will close the thread. If you have another question, or want to revisit this topic, please open a new thread.

Best Regards,