DS90UB934-Q1: Updated description of clock frequency during BIST operation

Kuramochi Tadahiko

Guru 28715 points

Part Number: DS90UB934-Q1

Hi,

I'm checking where updated point of datasheet.

However I can't find the difference with "SNLS507A" on "Updated description of clock frequency during BIST operation".

Could you show me updated point?

Best Regards,

Kuramochi

over 7 years ago

0 Palaniappan Manickam over 7 years ago

TI__Genius 10475 points

Kuramochi-san,

This is referring to the text added in the BIST configuration and status section as shown below:

The clock frequency that is output onto the PCLK pin during BIST mode is based on an internal FPD-Link III clock, and may not match the expected PCLK coming from the serializer.

0 Kuramochi Tadahiko over 7 years ago in reply to Palaniappan Manickam

Guru 28715 points

Palaniappan-san,

Thank you for your reply.

However, the same sentence is described on SNLS507A.

Best Regards,
Kuramochi

0 Palaniappan Manickam over 7 years ago in reply to Kuramochi Tadahiko

TI__Genius 10475 points

Kuramochi-san,
Sorry for any confusion. It is possible this was already added in Rev A but the revision history did not reflect this properly, and this may have been included in the rev history when we recently went through another update of this datasheet.

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DS90UB934-Q1: Updated description of clock frequency during BIST operation