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TMDS181: clock/data recovery, silicon revision, and intra-pair skew

Xi Luo
Prodigy 70 points
Part Number: TMDS181

Hi,

Our boards are currently using the TMDS181 as part of the HDMI solution on the sink side.

My question is regarding HDMI2.0 mode, when it goes into retimer mode.

1. How exactly does the TMDS181 recover just the clock? From the datasheet description, it sounds like there is a CDR on the CLK input pin only, and it uses that recovered/clean clock to sample the data on the RX0/1/2

2. The second question is the REV_ID read back from address 08h, we see the same revision 1 as mentioned in the datasheet. Is this the latest silicon rev?

3. We are seeing HDMI compliance failure following the recommended use model, failure is on RX1 pin only with the intra-pair test start to fail at 0.6Tbit skew (negative) in debug mode. The compliance test limit is ~0.7Tbit. No issues when positive skew is applied. RX0/RX2/CLK lanes all pass the test and our board trace intra-pair skew is within 1ps from simulation.

the datasheet has a parameter Tsk_intra (output skew) from the TMDS181 which is 0.15Tbit, which is roughly about 25ps in 4K mode. Is my understanding correct that regardless of the input data skew, the TMDS181 will always provide an output under this datasheet limit? (obviously there would be bit errors if the input data skew is too large)

Thanks,
Xi

  • 0
    TI__Guru**** 176721 points
    Xi

    Have you tried to tune the VSADJ resistor to see if intra-pair skew can be improved?

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 70 points
    Yes, we are in the process of changing the resistor. Currently we have 6.81K (and I have tried using this value with higher VOD and -2dB de-emphasis but no impact on the failure mode). We are changing it to 7.06K right now.

    1. Datasheet suggest having a higher VOD with -2dB is better for intra-skew at the TX output. So would it make sense that we actually use a lower resistor like 5.5K as an experiment instead of the default 7.06K?

    2. Would that resistor actually impact the intra-pair skew tolerance the RX front end? Because I am expecting it may make a difference at the TMDS181 TX output end due to the TX swing adjustment also depending on this resistor, but that does not seem to be where the issue is at. The RX sink applicaiton makes the TMDS181 the receiver where it need to tolerance the HDMI skew spec, but somehow we get bit errors only when RX1 has a negative skew applied to it after the TMDS181 TX (the TX output intra-pair skew should be isolated from the RX input intra-pair skew)

    I actually suspect something is going on at the RX front end, hence the questions on CDR as well.
  • 0 in reply to Xi Luo
    TI__Guru**** 176721 points
    Xi

    I want to clarify on your question, are you seeing compliance failure on the input or the output of TMDS181? Changing VSADJ will only impact the output intra-pair skew.

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 70 points
    Intra-Pair skew test is an RX input test, TMDS181 is the receiver here as I mentioned before. TX is a Keysight HDMI solution using AWGs, fully calibrated.

    We have another receiver that captures the output of the TMDS181 (which we can't rule it out 100%, but are pretty confident it is not the issue). Hence the question about whether if under all conditions, the TX output of the TMDS181 will always give less than 0.15Tbit intra-pair skew.

    We have seen earlier ASIC from other vendor that have silicon bugs, therefore the question on the Silicon Rev.

    I want to understand how the TMDS181 CDR works and how the data signals are sampled so I can better assess whether if it is likely the chip is failing marginally, or there is something wrong with the board trace (under review) or HDMI connector (unlikely).

    Thanks
  • 0 in reply to Xi Luo
    TI__Guru**** 176721 points
    Xi

    Is this your test setup?

    Keysight HDMI Tester -------- TMDS181 --------- Scope or another receiver

    Where do you measure the intra-pair skew, at the input of TMDS181?

    There is CDR on the clock and data lane, and the clock gets multiplied up by the internal PLL, which then use the clock to sample the data.

    If you are reading a 1, then it is the latest silicon rev.

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 70 points
    Thank you for confirming the silicon Rev.

    Yes, the connection diagram is correct. I don't measure the intra-pair skew, it is set by the Keysight HDMI tester and TMDS181 will observe the full compliance test skew value at it's RX inputs. Keysight HDMI tester and cables/Wilder Tech adapter are calibrated prior to testing.

    Our board team is still reviewing the board trace from HDMI connector up to the TMDS181 RX input pin.

    Just to make sure I am understanding this correctly, there is a CDR on each of the 3 data lanes? or just one CDR on the master data lane 0 (or lane 3)? Thanks.
  • 0 in reply to Xi Luo
    TI__Guru**** 176721 points
    Xi

    Each lane has its own CDR.

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 70 points

    Hi David,

    I have some additional questions about TMDS181 performance against the HDMI specification.

    When using the TMDS181 in a Sink application, I read from the current published datasheet that while the device is in Retimer mode, the Input intrapair skew tolerance is 112ps (MIN) when data rate = 1.6 Gbps (Section 6.6)

    So the question is for HDMI2.0, which TMDS181 claims to be complaint, the HDMI Spec requires that the Sink AC Input allows a maximum of 0.15Tbit + 112ps Intrapair skew. At 6Gbps, 0.15Tbit is about 25ps. This means the input signal to the Sink connector could be having a intrapair skew of 137ps.

    Since the datasheet only specified the MIN value of 112ps (@1.6Gps), what is the maximum skew that the device can tolerate under 6Gpbs? This was not described in the datasheet.

    Thanks

  • 0 in reply to Xi Luo
    TI__Guru**** 176721 points
    Xi

    Unfortunately, I don't have the data for 6G. For 1.6G, the max is around 300ps.

    Thanks
    David