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TLK1501: System can not communicate successfully.

Part Number: TLK1501

Dears:

There will happen that system can not communicate successfully.

From the customer's system, there are 2 boards(Mainboard A and Deviceboard B), and the boards communicate with optical.

The solution is TLK1501+ SFP Module.

The communicated frequency is 50MHz.

The issue:

1. The 16-bit data sent by the Mainboard A‘s FPGA to the TLK1501 is normal. The data parsed by the Deviceboard B is not the data sent by the A board. The 16-bit output pin of the TLK1501 on the driver board B appears to have been hopping data. Looks like there is no synchronization success?

2. The 16bits data sent by the Mainboard A‘s FPGA to the TLK1501 is normal. There is no jump data on the 16bits output pin of the TLK1501 on the Deviceboard B, but the 16bits data parsed on the driver board B is misplaced, such as the main control board. The 16-bit data 16'b1000_0000_0000_0000 is transmitted, and the driver board parses it to 0110_0000_0000_0000; the data of the highest bit 15 is placed on the bit 13 and bit 14 at the receiving end.

3. The 16bits data sent by the Mainboard A‘s FPGA to the TLK1501 is normal. The 16bits output pin signal of the TLK1501 on the Deviceboard B is also normal, and the downlink communication is normal; only the 3bits data of the drive board B uplink is misplaced after being parsed by the main control board. For example, the driver board sends 3bit data 3'b001, and the main control board TLK1501 receives 010 after parsing, and the uplink communication fails.

Pls. kindly give some advice about the issue.

Mainboard A:

MainBoard_FIBER_SFP.pdf

DeviceBoard B:

DriverBoard_FIBER.pdf

  • Lian,

    I will review your schematics and the information provided and get back to you as soon as possible.
  • Lian,

    Sorry for the late reply. I am having some trouble finding a specific solution to this issue as you describe it. This kind of error may indicate a sync failure. To be sure of this it is best to monitor the signals mentioned in figure 7 - 9 and compare. If you could provide some more information (i.e. scope captures) of what these signals are doing when you see the issues mentioned in list items 2 and 3, this will help us have a better understanding why DeviceBoard B may generating errors.

    Also I have reviewed both schematics and I have one question. Why is RX_ER tied high on both boards? This pin is a output and is useful when determining ACQ, Sync, Check states of TLK1501. Otherwise the schematic looks good so far. I will continue to review to make sure nothing else could be causing this issue.
  • Lian,

    Is there any more support needed for this issue? If so please reply with any relevant details so that I can further assist you. For now I will be marking this thread as "TI Thinks Resolved". If you have resolved your issue, please post the solution to the original problem/post for others with similar issues.
  • Hi Malik Barton57:
    Many thanks for your support!
  • Luck,

    Your welcome, I am glad you were able to resolve the issue. Could you post a description of how you solved the issue for others that may run into this issue?