TLK2711EVM-CVAL: reference clock generator

Bernard Bertrand

Part Number: TLK2711EVM-CVAL

I use tlk2711 with counter pattern through transmitter->receptor. But I have an external clock generator problem for the TLK2711 reference clock (TXCLK-GTX_CLK). When I use a function generator (out 50ohm) for the reference clock the data output from transceiver are correct. But when I use output clock MRCC of FPGA kintex for the reference clock the data output from transceiver are not correct.

I think the problem come from unmatched impedance output lvcmos 2.5 FPGA. But the digital control impedance don’t work on 2.5V FPGA bank.

Other idea, comment?

Regards,

over 5 years ago

0 Wade Vonbergen over 5 years ago

TI__Guru 62930 points

Bernard,
It is very likely you are not meeting the jitter input requirements for GTX_CLK.

The EVM does not have termination, so driving from 50ohm source requires setting lower drive levels to prevent overdriving the inputs.

The jitter requirements are 40ps pk-pk jitter, and this is fairly stringent.
However, you can reference other E2E posts regarding this.
e2e.ti.com/.../412382

This post references bandwidth of 10Mhz. However, the jitter transfer peaking is in the range of 1-3Mhz.

Regard,
Wade

0 Bernard Bertrand over 5 years ago in reply to Wade Vonbergen

Prodigy 70 points

effectively the pk-pk jitter in fpga clock manager is 204ps VS  tlk2711 40ps pk-pk jitter
it is not good enough!
thank you for this way.

Regards,
Bernard

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TLK2711EVM-CVAL: reference clock generator