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DS90UB940-Q1: Can i adjust Frame Blanking Period time?

Part Number: DS90UB940-Q1

I have problem: on my board, the mipi receiver soc can decoder frame, however it seems that Frame Start and Frame End packets got confused, and I lost frame synchronization, i.e.,  frame keeps scrolling from bottom to top.

My first feeling is: the Frame Blanking period might be not match from 940 to my receiver soc. So, can i ask if there is a way on 940, where I can adjust 940 frame blacking period?

Thanks!

  • Hi Dennis,
    What serializer are you using? The 940 generates Frame Start and Frame End packets base on incoming VS signal.
    940 cannot adjust frame blanking period.
    This need to be done from the input side. Please make sure VS signal generation and DE signal generation are correct.


    Best Regards,
    Charley Cai
  • Hi, Charley,

    We are using DS90UB925 for serializer. However, i am testing 940 internal test pattern first.

    To play with the test pattern, according to www.ti.com/.../snla132c.pdf, i am using:

                     .PixelClock = 67M,

                     .ActiveHorizontalWidth=1280,

                     .HorizontalFrontPorch = 110,

                     .HorizontalSyncWidth = 40,

                     .HorizontalBackPorch = 220,

                     .TotalHorizontalWidth = 1650,

                     .ActiveVerticalHeight = 720,

                     .TotalVerticalHeight = 750,

    and change to use combination:

    1.              .VerticalFrontPorch = 20,

                     .VerticalSyncWidth = 5,

                     .VerticalBackPorch = 5,

    2.              .VerticalFrontPorch = 5,

                     .VerticalSyncWidth = 5,

                     .VerticalBackPorch = 20,

    3.              .VerticalFrontPorch = 5,

                     .VerticalSyncWidth = 20,

                     .VerticalBackPorch = 5,

    But, all have same scrolling problem.

    Meanwhile, i get confirm from the soc provide, and their MIPI PHY module needs at least 5 lines time from FrameEnd(FE) to FrameStart(FS), in order distinguish two short packages. As such, do you think it is 940 can not satisfy this request by default test pattern output, to cause this problem?

    Thanks,

    Dennis

  • Default timing should be able to meet the 5 lines requirement. I will do some bench validation and get back to you.

    Were you using external timing source or internal?
    Just making sure, scrolling is not enabled right?


    Best Regards,
    Charley Cai
  • Sorry, I have not described "scrolling" clearly. My "scrolling" is NOT 940's test pattern "Auto-Scrolling",  it is:

    i. display is divided two parts with one garbage gap between;

    ii. bottom looks a new frame, while top part looks like previous frame;

    iii. bottom part frame moves out from bottom, up extend and fill all top part, and then another new frame move out from bottom again.

    I test with and without 940 pattern "Auto-Scrolling", my problem keeps same.

  • Below is my setup for 940 test pattern, and I am using internal timing source.

    Reg Value
    --------------
    0x01 0x06

    0x64 0x00

    0x66 0x03
    0x67 0x03

    0x66 0x07
    0x67 0x00

    0x66 0x08
    0x67 0x05

    0x66 0x09
    0x67 0x2D

    0x66 0x04
    0x67 0x8D

    0x66 0x05
    0x67 0xE5

    0x66 0x06
    0x67 0x2F

    0x66 0x0C
    0x67 0x32

    0x66 0x0D
    0x67 0x14

    0x66 0x0A
    0x67 0x1A

    0x66 0x0B
    0x67 0x06

    0x65 0x05
    0x64 0xB1

    0x01 0x01
  • I actually recorded a video to show the problem as attachment. Note: inside video, there are two displays, both test for same 940's test pattern, but on different MPU soc:

    1. bottom display:  it is test on your TI Jacinto6 base platform. The result is good. It has nothing with my problem, but just for a comparison;

    2. top display: this is my problem, and MPU is Socionext sc1810.

  • Hi, Charley,

    Socionext sent me below message, so, there is likely something which we could dig out on 940 side...

    "

    Previously, my customer use DS90UB940 and Triton MIPI capture. Triton is is former SoC than Miranda.

    The issue that the captured image is rolling happened.

    (Note: The reason of this issue might be different because Miranda MIPI spec is different from Triton MIPI spec.)

     But, unfortunately, I don't have detailed information for the issue because the issue is fixed by customer side.

    They said TI 940 chip, the registers description in the datasheet is not enough.

    Could you ask TI to this issue ?

    "

  • Hi Dennis,

    I am looking into this. I will get back to you in a few days.

    Best Regards,

    Charley Cai

  • Hi, Charley,

    Any update?

    Thanks,
    Dennis