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DS90UB927Q-Q1: About the PDB terminal at power ON

user5877721
Prodigy 60 points
Part Number: DS90UB927Q-Q1
In our current design, pull up is done with the 3.3 V power supply to the PDB terminal.
In that case, the PDB terminal goes High momentarily when the power is turned on.
Although the reset will be canceled for a moment before the reset cancellation at the expected timing, is there a problem?
Is "Pulldown" rather than "Pullup" better for logical fixing of PDB terminals?
  • 0
    TI__Genius 12866 points
    The pull up to 3.3v requirement is there so that if PDB is not driven externally by an processor, the 927 will still power up.
    If you have a processor that drives the PDB pin, it is possible to remove the pull up and only use the processor to control PDB.


    Best Regards,
    Charley Cai
  • 0 in reply to Charley Cai
    Prodigy 60 points
    Thank you for replying. I understood.

    In our design, the processor is also connected to the PDB pin.
    In that case, I am worried that the reset will be canceled for a certain period by pull-up until control by the processor is entered.
    Is it OK if the reset is applied again by the control by the processor after cancellation for a certain period by pull-up ?
    Or should I not reset the PDB pin until reset is released by the processor?
  • 0 in reply to user5877721
    TI__Genius 12866 points
    It is ok to apply the reset again by processor. Make sure the processor will drive the PDB low for at least 1.5ms before driving the signal high again.

    Charley Cai