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TPS65987D: How to config the TPS65987D for USB only mode and DP+USB mode by set new register values?

Part Number: TPS65987D
Other Parts Discussed in Thread: TUSB1064

I'm trying to use TPS65987D as a UFP only  with a switch function between USB3 only, DP alternate (USB3 + DP 2lane) and DP 4 lane.

But I don't see which registers control this.

Couse when I set TUSB1064 to one pin mux mode, I need also the TPS65987D to tell the host the same mode by CC. is that right?

  • Hi Cun,
    When you create a new TPS65987D, ROM 1.6, Advanced, UFP only, DP only project, the GPIO settings for UFP DP mode should be automatically updated. You want to make sure you have DP Mode select event, DP Hot plug, USB3 event and Cable orientation event correctly configured on GPIO pins. In port configuration you want to make sure USB 3.0/3.1 Rate is supported.
    To switch between the modes mentioned above, you will need an external EC capable of configuring the TPS65987D. In TPS65987D display port capabilities you want modes C and D enabled under UFPD plug or receptacle depending on your system. To enter USB3 only, the external EC should Disable Display Port SVID. To enter DP alternate (USB3 + DP 2lane), enable Display Port SVID, and enable multifuction preferred (This will prefer USB3+DP 2lane over DP 4lane). If DP 4lane is connected with multifunction preferred, TPS65987D can still enter this mode even with multifunction enabled.
    For DP 4lane, enable Display Port SVID, disable Multifunction preferred and DP 4lane will have priority.
  • Hi Kedar

    Appreciate for all of your help.

    1.  Do you mean to use an external EC to communicate with 65987D via I2C to make the above function work?

    2.  My understand is use an external EC to modify the register values of 65987D via I2C, the contents are enable/disable DP SVID, enable/disable  multifuction preferred. Those two options can figure out which is the mode I wanted within the total 3 modes. Am I right?

    3.  In this case, the value of SVID is 0xFF01, and  just need to focus on enable or disable it, right?

    4. What's the address of the registers to enable/disable DP SVID and  multifuction preferred?

    Thank you,

  • Hi Cun,

     1. Yes.

    2. You are correct. You want to make sure the GPIO settings are correct, and that the modes C and D are correctly configured as multifunction enable/disable will choose from these 2 modes depending on preference.

    3. The value of DP SVID is 0xFF01 and this is to confirm that you have successfully entered DP mode. This status can be found in Alternate Mode Entry Sequence register (0x38). To disable DP SVID see below

    4. DP SID configuration register (Display Port Capabilities) 0x51 can enable/disable DP SVID  and enable or disable multifunction preferred.

    For a detailed description of the registers of TPS65987D refer to TPS65987DDH and TPS65988DH Host Interface Technical Reference Manual linked below

    www.ti.com/.../slvubh2b.pdf

  • Hi Kedar

    Thanks for your supporting.

    And when I open the App Customization Tool for 65987D. And those New Project --> TPS65987DDH --> Advanced --> UFP only --> None (DP Only). I will get define setup pictures for 0x38 and 0x51 as below.

    I have two things want to confirm with you:

    1.  For 0x38, I need to enable bit56, and leave bit24 as disable, right?

    2. For 0x51, need to control bit 0 and bit 32 by EC for switch the three modes above, right?

  • Hi Cun,
    1. Limited mode entry (Bit 24 and 56 in register 0x38) don't matter for TPS65987D as it is a 1 port device. When set, entry to this mode is only possible if no other port has currently entered this mode, and is applicable to TPS65988DH which is a 2 port system. It is used to make sure that both ports do not enter the same Alternate mode configuration. For example, both ports entering DP mode.
    Alternate mode Entry Queue 1 contains the SVID for Intel Thunderbolt Mode and Alternate mode Entry Queue 2 contains SVID for DP mode. Since you have DP only mode for your project setting, it will automatically have Bit 0 Enable Intel VID in Intel VID config register (0x52) disabled and you will not enter SVID 0x8087, which is first in the queue. You will automatically enter Display Port which is second in the queue depending on the status of Bit 0 in register 0x51.

    2. Yes, you are correct.
  • Hi Kedar

    Appreciate for your reply.

    So in my case, I only need to focus on register 0x51, and when I enable the DP SVID bit, the SVID will always set to 0xff01, right?

  • Hi Cun,
    The DP SVID is a standard ID and will always be 0xff01. Since you have Intel mode disabled, it will enter DP which is second in the priority list (depending on status of bit 0 register 0x51). But essentially yes, you are correct, you only need to focus on register 0x51 for your application.
  • Hi Kedar
    Got that, Thanks
  • Glad to be of help!