DP83822I: RX FIFO Overflow/Underflow Status

Takeshi Sasaki

Expert 4480 points

Part Number: DP83822I

Hi team,

Could you give comments on following register/bit are typo? I think default status should be normal.

0x0017(RCSR); bit3;RMII Overflow Status; Default=0, 0=Overflow detected

0x0017(RCSR); bit2; RMII Underflow Status; Default=0, 0=Underflow detected

Thank you for your support.

Best regards,

Takeshi Sasaki

over 6 years ago

0 Aniruddha Khadye over 6 years ago

TI__Mastermind 18425 points

Hello Sasaki-san,

Yes, it is a typo for both bits 3 and 2. When the bits are '1' overflow/underflow is detected, when they are '0' then PHY is in normal operation.

-Regards
Aniruddha

0 Takeshi Sasaki over 6 years ago in reply to Aniruddha Khadye

TI__Expert 4480 points

Hi Aniruddha,

Thank you for your confirmation. Understood. Thanks!

Interface

Interface forum

DP83822I: RX FIFO Overflow/Underflow Status