DS80PCI402: can not pass PCIE gen 3 eye testing

Hi,

The waveforms do not really even show an eye opening.  Do you have additional information about the customer system losses before and after the DS80PCI402?  Also, do you have the DS80PCI402 configuration settings and a schematic diagram? 

Thanks and Regards,

Lee

Hi, 

Please refer to the capture for the schematic diagram, for the rest of information, now is asking from customer. 

Please note that the cap: C20, C4, C3, C23, C26, C28, C29 and C32 is changed to 0 ohm because there already been put at the main board. 

I will update if there are further information and please let us know if there are comments.

Thanks for your help.

I do not see anything out of place in the schematic. Maybe start without adding any DEM to the waveforms to establish a baseline (DEM0 = 1K to 3.3V and DEM1 = 1K to GND).

Regards,
Lee

Hi Lee,

Does DS80PCI402 belongs to linear or limiting redriver ?

Hi Lee, 

After testing, neither change the DEM nor using the gen2 setting to run gen3 works on this case, can you help to suggest other way for the work around? 

Please let me know if further information needed. 

Thanks for your help.

For Gen3 datarate the redriver will act in a linear fashion.
For Gen2 datarate the redriver will act in a limiting fashion.

Did you capture any waveforms with the different settings?

What amount of transmission line losses are expected or estimated in the system between the components?

System PCIe Tx -> (Loss at 4 GHz ?) -> PCI402 -> (Loss at 4 GHz ?) -> System PCIe Rx

Regards,
Lee