SN65HVD3082E: questions for waveforms

Hi Brian,

During this initial period it looks like all drivers on the bus are disabled, resulting in a differential voltage level on the bus close to 0 V. Since the HVD3082E features internal failsafe biasing, it will interpret this 0-V input as a logic "high" level on RXD. The MAX1483 doesn't specify any failsafe biasing, so a 0-V input results in an undefined state (since the input is between the minimum and maximum receiver switching threshold specifications). In this case it seems this IC is outputting a low level in response to the 0-V input, but other ICs may output a high level instead.

If you want both devices to behave the same way, you would need to make sure that the differential signal always above or below the receiver threshold range. For RS-485 buses this is often implemented by adding a pull-up resistance on the A line and a pull-down resistance on the B line. This provides a small differential voltage between A and B even if the bus is idle, and so all receivers will interpret it as a high level.

For more information on RS-485 failsafe biasing, I recommend reading this blog:

e2e.ti.com/.../rs-485-basics-two-ways-to-fail-safe-bias-your-network

Please let me know if you have any further questions.

Regards,
Max