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TPS65987D: Absolute Maximum Rating of I2C Interface, I2Cx_SDA & I2Cx_SCL

Koshi Ninomiya
Expert 6055 points

Part Number: TPS65987D

Hi Team,

About the Absolute Maximum Rating of I2C Interface of TPS65987D, I2Cx_SDA & I2Cx_SCL;
When I2C bus interfaces are pulled up to external EC (Embedded Controller: I2C Master) 3.3V, but LDO_3V3 of TPS65987D is off,  because VBUS and VIN_3V3 are off, are there any issue to TPS65987D under this condition?
Could this situation cause back-drive the TPS65987D?
Are there any solutions to avoid the back-drive the TPS65987D under LDO_3V3=Off, but external 3.3V for I2C bus power=On?
Thank you.

Best Regards,

Koshi Ninomiya

  • 0
    TI__Mastermind 36756 points

    Hi Ninomiya-san,

    There should be no issues with this case since the PD controller would be completely powered down if VBUS and VIN_3V3 are both 0V.

    If this answers your question, PLEASE select This resolved my issue

    Thank you,
    Eric

  • 0 in reply to Eric Beljaars
    TI__Expert 6055 points
    Hi Eric-san,

    Please let me confirm, Absolute Maximum Rating of I2Cx_SDA & I2Cx_SCL pins are (LDO_3V3 + 0.3)V on the TPS65987D datasheet. When LDO_3V3 is 0V, is it OK that the I2Cx_SDA & I2Cx_SCL pins are pulled up to the external 3.3V? Are there any risks that leak current flow into I2Cx pins? Leak current goes from the external 3.3V to I2Cx pin to internal ESD diode? to LDO_3V3?
    Thank you.

    Best Regards,

    Koshi Ninomiya
  • 0 in reply to Koshi Ninomiya
    TI__Mastermind 36756 points

    Hi Ninomiya-san,

    We recommend pulling the I2C lines to LDO_3V3 to avoid any potential leakage issues. Additionally, this would ensure the I2C pull-ups are active when the TPS65987D is on.

    If this answers your question, PLEASE select This resolved my issue

    Thank you,
    Eric