TDP158: An application related question

Roy Hsu

Part Number: TDP158

Hi Team,

The picture below shows the TDP158 application designed by my customer. They want to know if the distance between the CPU and the TDP158 seems reasonable or not? (DDI bus refers to the data signals)

According to Intel's spec, 8500 mil seems to be the maximum acceptable length. Since the designed length is larger than the spec, do you think this would still work considering also the PCB and connector losses?

Thanks!

Roy Hsu

over 7 years ago

0 David (ASIC) Liu over 7 years ago

TI__Guru**** 187891 points

Roy

Would you please share the diagram from the spec showing the location of different segment as stated in the table?

Thanks
David

0 Roy Hsu over 7 years ago in reply to David (ASIC) Liu

TI__Genius 9360 points

Hi David,

I'll send it to you via email.

Thanks!
Roy Hsu

0 David (ASIC) Liu over 7 years ago in reply to Roy Hsu

TI__Guru**** 187891 points

Roy

Assuming 5in trace width with FR4 board material, loss per inch at DP 5.4G data rate is ~0.59dB/in. 9 inch trace give you 5.3dB loss, but you also need to factor in the loss of the gold finger, package, AC coupling capacitor. But with DP158 equalizer have 15dB loss, you still have ~10dB margin assuming TX has no pre-emphasis.

Is this a dock design or the design is fixed? If the design is fixed, then TDP158 is fine since the RX equalizer will be optimized for this particular design. If not, you may need to consider DP159 the retimer solution.

Thanks
David

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TDP158: An application related question