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TPS65981: Problems Connecting TPS65981EVM with DP Expansion to Xilinx MPSOC

Part Number: TPS65981

Dear TI,

I have two TPS65981EVM with DP Expansions configured to source and sink both video and power over USB Type C.  The setup works great with standard linux and windows PC's.  I am now migrating to a Xilinx FPGA implementation using their MPSOC family and am now struggling to get video working.  Nothing has changed on the hardware setup but the major difference is moving more to an embedded ARM environment.  I am able to connect the Xilinx solution to a display port monitor at 1080p with no problems.  However when I insert the TPS65981EVM hardware solution it no longer functions.  

I was digging into the details in slva844b and saw two bits that I was wondering if would solve my problem.  The "multifunction" and "auto entry allowed".  I was hoping on more guidance from TI on understanding tips and tricks to verify what the problem could be. It looks like a USB type C analyzer would help but was curious if there are other debug tools that can help.

Sincerely,

Jason 

  • Hi Jason,

    In case of 4 lane DP only video works and there will not be any USB 3.0 functionality available as all the SS lines will be used up by the DP. When 2 lane DP mode is used then half of the SS lines are used by DP and half of it is used by the USB 3.0 enable simultaneous USB 3.0 and video. Multifunction prefered bit is useful when your system supports both 4 lane and 2 lane DP ports. Setting this bit indicates that the system prefers to operate in 2 lane DP mode and will pick 4 lane DP mode only if 2 lane DP is not supported.

    Auto entry mode tells the system to automatically enter all the alternate modes available, the system will need external intervention to enter the alternate mode if this bit is not set.

    The only way to check this is to use a Type-C/PD analyzer.

    Thanks,
    Rahul
  • Rahul,

    Thanks for this information.  My hardware only supports two lanes of DP.  I currently have installed the 4.03 GUI tool and am using the DFP Advanced configuration for the side connected to my display port source.  Is there a way to verify in the Application Customization Tool that it supports the two lane mode?  

    It looks like if you set the pin mode to C or D it will negotiate to use 4 lane or 2 lane + USB3.1?  Here is the snippet of my setup for Display Port.  

  • Hi Jason,

    The GUI support all the modes defined in the DP specification. Please note that Pin assignments 'B', 'D' & 'F' supports 2 lane DP & Pin assignments 'A, 'C' & 'E' supports 4 lane DP.

    Now depending on your requirement you can pick the right pin assignments to suit your application.

    Please click "This resolves my issue" if I was able to answer your query.

    Thanks,
    Rahul
  • Rahul,

    Here is the schematic snippet of the display port connector on my source.  I am then connecting to the two TPS65981 EVMs as described earlier in the post.  Can you let me know the ideal pin assignment configuration?  I assume I have to set both of the TPS65981 EVMs to this pin setting?  

    I am connecting to the J5 connector on the DP Expansion EVM.  Here is the schematic snippet and the pin numbers seem to match but I wanted an independent review from you:

  • Hi Jason,

    Please try with Pin assignment B and D.

    Thanks,
    Rahul
  • Hi,
    I am the customer Jason is trying to help! I have followed these suggestions and clearly the Aux channel is now reaching something as I can see a connected device when I issue Xrandr command. However, I get the error that link training fails.
    I am using all of the above information to connect. What else could I try?

    I am assuming that link training is failing because the wrong lanes are connected? I am using the lower two and don't really understand the ABCDEF naming convention. So information there would be great as well.
  • Rahul,

    Can you comment on the ABCDEF naming convention and where we can see the pinout configuration of a connector?  I have been having a hard time finding documentation on the convention and where the lanes are supposed to be physically mapped.

    Thanks,

    Jason 

  • Hi Jason,

    These pin assignments are defined in "USB Type-­‐C DisplayPort Alternate Mode" specification.

    Please click "This resolves my issue" if I was able to answer your query.

    Thanks,
    Rahul