Per Prior E2E thread with Ross Pimentel we're proceeding with a transformerless Design: Fixed 100Base-TX, <1meter cable, capacitively coupled. We have the following related questions:
1.) For our fixed 100Base-TX transformerless implementation we plan on using the DP83867IR TD_P/M_A and TD_P/M_B pins, leaving TD_P/M_C and TD_P/M_D open. Is this correct?
2.) For this transformerless design are any external biasing and/or terminations required between the ac capacitors and the DP83867IR or is all that internal to the DP83867IR?
3.) In our application both ends of the link will share a common ground reference, we plan on using a 100nF AVX ESD51C104K4T2A-24 as the ac coupling cap. This part is rated for 100V, with a 24kV ESD rating in a 0805 package. It’s our understanding that since both ends of the link share a common ground reference the Ethernet isolation voltage requirements don’t necessarily apply but ESD issues do apply due to cable mates/unmates. Given our transformerless design is this considered a robust implementation?
Thanks,
-John
