TPS65987D: FW OCP threshold

Hi Anderson2,

PDO current setting means Maximum Current.

Highlighted in the document is Power Data Object #1. We can read the highlighted box, 3A, as the maximum current offered by the source to the sink under this particular potential contract.

Does this answer your question?

Regards,
Scott

Hi Scott

Thank you.
My application is power source and PDO1 is 3A.
When I try to keep to load 3.3A by connected sink under PDO1, but the TPS65987DDH didn't open the FET.
Do you know why?

HI,

I understand that the system has a 3A contract.

Are you able to verify and measure the VBus current under test? I think the next step is to make sure there is an over current situation.

Regards,
Scott

Hi
Thank you.
I measured VBUS and it's 3.31A during over 10sec.

Hi,

In the linked document, can you check section "3.2.2 How Overcurrent Clamp Setting in GUI Relates to Overcurrent Clamp Setting in the TPS65987DDH" against your selected Peak Current?

The document gives one example based on the given table: "when setting the overcurrent clamp point to 3 A with 100% Peak current, the internal firmware will select the setting with the minimum trip point of 3.060 A and maximum of 3.74 A. With that, the TPS65987DDH would clamp current at a minimum of 3.060 A and a maximum of 3.74 A when set for a 3 A PDO with 100% peak current. "

Regards,
Scott

Hi
Peak Current setting is 200%.
But "the PDO current setting" mean Maxmum current setting, right?

Hi,

I may have been unclear -- In the Transmit Source Register, the field "Maximum Current" means the maximum current offered as part of a PD power contract. A sink cannot request current above the Maximum Current. The field "Peak Current" configures Firmware Overcurrent Clamping as a percentage of the Maximum Current.

One idea is to check operation in the example from above -- reduce Peak Current to 100% and test operation against predicted trip points.

Regards,
Scott

I could confirm overcurrent clamping by "Peak Current" setting.
I'd like to confirm the following operation.
How can I test this operation?

"If the average current going through the FET during the last 10 ms of operation is greater than
the PDO current setting highlighted in Section 3.2.1, the TPS65987DDH will open the FET."

Hi,

Could you help me understand more what you would like to test?

I agree with the quote above. In firmware over current clamping mode, current levels are monitored over time and the FET adjusted to maintain them as configured. I expect to see output behavior similar to the Figure 7, p9 in the attached application note. This figure is for a 5 V 3 A PD Contract with 200% Peak Current.

Best regards,
Scott

Hi
My understanding is following.

TPS65987D has 3 OCP protections.
1 : HW OCP. Threshold is 10~20A. Open FET within around 20us. Explained from p10 to p13.
2 : SW OCC. Threshold is "Peak Current" setting. Open FET after 640us countdown. Explained from p5 to p10.
3 : SW OCP. Threshold is "Maximum Current" setting. Open FET by average of 10ms. Explained from p4 to p5.

I'd like to test "3 : SW OCP" operation. So, I set Peak Curent = 200% to disable "2: SW OCC".
This document has few explanation about "3 : SW OCP".

Is my understanding correct?

Hi Anderson,

Starting in section 3.2.1, the document describes overcurrent clamping when the system is in an implicit contract state. An implicit contract occurs after attach but before an explicit contract is negotiated. Starting on page 7, the document describes overcurrent clamping when a PD contract is established.

During an implicit contract, the overcurrent clamp is defined by "Type-C Current" field in register 0x29. For example, Figure 2 shows the clamp behavior when the Type-C Current field is set to "3A (Strongest Pullup)".

After an explicit contract is negotiated and a Power Data Object is exchanged, clamping behavior is defined by Maximum Current and Peak Current (as we discussed earlier).

Regards,

Scott

Hi Scott

Thank you but I know Over current CLAMP behavior.

Your explanation is about OCC which debounce time is 640us.

I'd like to confirm the following overcurrent PROTECTION behavior which debounce time is 10ms.

How can I check this 10ms protection?

"If the average current going through the FET during the last 10 ms of operation is greater than
the PDO current setting highlighted in Section 3.2.1, the TPS65987DDH will open the FET."'

I tried to check this 10ms specification by following step.

1. Set Peak Current = 200% and Maximum current setting = 3A

   Reason : I'd like to check 10ms average protection but OCC will active by 640us.

                  So, I want to disable OCC, but there is no disable option in APP Custom Tool.

                  200% is the most higher threshold of OCC. It is the most difficult to detect OCC working point.

                  This is the reason why I set to Peak Current = 200%.

 2. Load 3.3A

 3. I wait over 10ms but OCP is not worked.

 

According to the document, if the average current going through the FET during the last 10 ms of operation is greater than the PDO current setting,  the TPS65987DDH will open the FET.

In my check, the average current is 3.3A and it's greater than the PDO current setting, 3A. Why did the FET not open?

Hi,

OCP is only active for contracts > 5V. The system needs to be in a contract greater than 5V to test OCP.
In the current example, 200% Peak current * 3A Maximum current means OCC will only occur at around 6A. TO test OCC using your example, I suggest setting peak current to 100%. A load of 3.3A will be sufficient in this case.

In section 3.2.1, the document explains that during an OCC, the system will regulate the internal FET by increasing Rds On. If the event lasts longer than 640us (the debounce time), the system will open the power path.

Regards,
Scott

Hi
Thank you.
What is the 10 ms protection at page4?

Hi,

This is the firmware over current protection moving average window. Is this the information you were looking for?

Regards,
Scott

Hi

Thank you.
What is average window?
How is it determined the threshold?