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DP83822I: Latch-in and Active I/O pins

Takahiro Saito
Expert 5455 points
Part Number: DP83822I


Hi team,

The page 15 in the datasheet shows the Latch-in and Active I/O pins.

Which pin should I monitor to see latch-in and active I/O pins signal?

Regards,

Saito

  • 0
    TI__Mastermind 23675 points
    Hi Saito,

    The bootstrap pins are good pins to monitor for you to see the latch-in to active.
    The reason why is that for a pin like COL, if you strap it HIGH (MODE 4) it will remain high during latch-in.
    After, the pin will be driven LOW.
  • 0 in reply to Ross Pimentel
    TI__Expert 5455 points

    Hi Ross,

    Thank you for your answer. I want to add two more question about this.

    1) What is a role of the signal of latch-in and active I/O pins?

    2) About the power up timing, what will happen when we violate the below timing requirements?

    T3: Hardware configuration latch-in time for power up

    T4: Hardware configuration pins transition to output drivers

    Regards,

    Saito

  • 0 in reply to Takahiro Saito
    TI__Mastermind 23675 points
    Hi Saito,

    A1) When the device goes to latch-in, it is simply sampling the voltage of that IO. This is the hardware configuration option.

    A2) I am not sure I follow. Those times are set by the device. Are you however trying to drive the pins before the IOs are configured? Is that the question?