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DS90UH948-Q1: power consumption for 85MHz or single lane OLDI output

Yoshikazu Kawasaki
Expert 3510 points
Part Number: DS90UH948-Q1

Hello,

My customer would like to know the power consumption of UH948 for the following conditions.  Would you please tell me these?  They refer to the values shown in the datasheet, but the ones they'd like to know aren't shown in the datasheet.

1. Power consumption when using dual lane inputs and dual link outputs at PCLK=85MHz.  Or do you have power consumption vs PCLK frequency for dual lane inputs and dual link outputs?

2. Power consumption when using dual lane inputs and single link output at PCLK=85MHz.  Or do you have power consumption vs PCLK frequency for dual lane inputs and single link output?

Best Regards,

Yoshikazu Kawasaki

  • 0
    TI__Mastermind 37500 points

    Hello,

    I will have to set this up using the Serializer and Deserializer EVM, it will take at least 2 days.

    I will use the external clock, with internal pattern generator on the serializer to drive several examples.

    Will post results when complete.

    Regards,

    Joe Quintal

  • 0
    TI__Mastermind 37500 points
    Hello,
    If you setup the DS90UB947 to DS90UB948 EVM. You can use the Pattern Generator on the 947, and Mode register on the 948 for this test.

    a) use separate 12v power supply for measurement. Setup 948 reg 34 bit6 on deserializer for lock

    b) 947 pattern generator you are using Internal Clock, so the Pattern Generator M and N values can be used to generate a clock.
    640x480 60 , M=2, N = 18 has a PCLK of 87.4Mhz.

    Single
    255ma @12v serializer, 140ma @ 12v Deserializer

    reg x49 for 948 controls over backchannel the Single or Dual mode

    c) changing this to dual mode, note in this mode, the LVDS output clock should be 1/2 the frequency of the 947 clock.
    260ma 2 12v serializer, 145ma @ 12v Deserializer

    Regards,
    Joe Quintal
  • 0 in reply to Radio-Joe
    TI__Expert 3510 points
    Hello Joe,

    Thank you very much for measuring the power dissipation. Now they'd like to know power dissipation for the followings. I'm very sorry when you're busy, but would you please measure again for these conditions?
    - Only deserializer
    - PCLK=96MHz with resolution of 1540x720
    - 2 lanes of FPD LinkⅢ inputs, single link of oLDI output
    - VDD33=VDDIO=3.6V, VDD12=1.26V
    Would you please measure the maximum current for each of IDD33, IDDIO and IDD12 with the above conditions?

    Best Regards,
    Yoshikazu Kawasaki
  • 0 in reply to Yoshikazu Kawasaki
    TI__Expert 3510 points

    Hello Joe,

    I'm very sorry to say this when you're busy, but my customer added one more thing.  I summarize the requests here.  Would you please check these?

    1. Maximum power dissipation for each of IDD33, IDDIO and IDD12

    - Only deserializer
    - PCLK=96MHz with resolution of 1540x720
    - 2 lanes of FPD LinkⅢ inputs, single link of oLDI output
    - VDD33=VDDIO=3.6V, VDD12=1.26V
    - The maximum power dissipation after repeating ten times or so

    2. Typical power dissipation for each of IDD33, IDDIO and IDD12

    - Only deserializer
    - PCLK=96MHz with resolution of 1540x720
    - 2 lanes of FPD LinkⅢ inputs, single link of oLDI output
    - VDD33=VDDIO=3.3V, VDD12=1.2V
    - The typical power dissipation after repeating ten times or so

    Best Regards,

    Yoshikazu Kawasaki

  • 0 in reply to Yoshikazu Kawasaki
    TI__Mastermind 37500 points
    Hello,
    The EVM power supplies are not variable. I will try your 96Mhz (max PCLK) single, 1540x720 case,
    and 96Mhz (convert to dual 48Mhz) dual, 1540x720 case.

    The EVM has a 12v input, R117 VDD33; R118 VDD18; R103 VDD12 are the current measurement locations. The resistors have to be
    removed to current shunt, or loop for current probe, the EVM needs to be modified for your request.
    There is no adjustment of the voltage we would have to replace the FB resistors, I will provide a ratio for linear power increase
    VDDIO should be low current, JP12, 1.8/3.3v or JP11 external

    I will work on it this week.
    Regards,
    Joe Quintal
  • 0 in reply to Radio-Joe
    TI__Mastermind 37500 points

    Hello,

    The progress today is to measure the 12v current for the Deserializer and Serializer.  Sizing the for the max power utilization, should follow the datasheet DC characteristics, these include part to part variation, in my case there is one serializer and deserializer.

    LinkMode, Serializer int clk, M, N, Displayed Clock, Act H, Total H, HFP, HSW, HBP, Act V, Total V, VFP, VSW, VBP, Serializer Curr @12v, Deserializer Curr @ 12v

    Single, Internal, 2, 17, 94.1Mhz, 1440, 1540, 45, 10, 45, 640, 720, 35, 10, 35, 259ma, 133ma

    Dual, Internal, 4, 19, 168Mhz, 1440, 1540, 45, 10, 45, 640, 720, 35, 10, 35, 285ma, 151ma

    You should check DS90UB948 datasheet, section 6.5, the DS90UB954 EVM schematic, in the user guide.  These numbers only apply to the single EVM I have.

    I don't have individual currents for the rails, please use the datasheet values and a margin for design.

    Regards.

    Joe Quintal