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DS90UB927Q-Q1: DS90UB927 can not get interrupt from DS90UB928.

Part Number: DS90UB927Q-Q1
Other Parts Discussed in Thread: DS90UB928Q-Q1, DS90UB926Q-Q1

I have set the register 0xC6 to DS90UB927,but i can not get interrupt form DS90UB928.Did i need to set some register to DS90UB928 with the function of interrupt?

The INTB_IN of DS90UB928 is connect TP.

  • Hello,

    could you pls check the INT description in UB927/UB928 d/s on how to set the INT function? pls make sure you follow up this design on register setting.

    7.3.12 Interrupt Pin (INTB)
    1. On the DS90UB927Q-Q1 serializer, set register reg_0xC6[5] = 1 and 0xC6[0] = 1 (Table 5) to configure the
    interrupt.
    2. On the serializer, read from ISR register 0xC7 to arm the interrupt for the first time.
    3. When INTB_IN on the deserializer (DS90UB926Q-Q1 or DS90UB928Q-Q1) is set LOW, the INTB pin on the
    serializer also pulls low, indicating an interrupt condition.
    4. The external controller detects INTB = LOW and reads the ISR register (Table 5) to determine the interrupt
    source. Reading this register also clears and resets the interrupt.

    best regards,

    Steven

  • I have been set 0xC6 register to 0x21(reg_0xC6[5] = 1 and 0xC6[0] = 1),and i have been try to read the 0xC6 and 0xC7.i read 0xC7 and the value is 0x80 before i set 0xC6,but when i have been set 0xC6,i read 0xC7 and the value is 0x00.Whatever did i do,the INT pin is low all the time.

  • Hello,
    1, the intb setting request is listed clearly in d/s already, no other requests for such application.

    2. for your issue, pls debug it step by step:
    a. the sch. design? does it follow up TI's request and EVM refer. design?
    b. measure and compare the two INTB signals in the de-ser and ser side.

    regards,
    Steven
  • Thanks for your reply.I measured the INTB pin whit 928 and 927,the 928 INTB is connect TP, so this is ok.but the INTB of 927 is low all the time.I don't know why.the INTB of 928 will maped to 927 when i set the 0xC6.
  • 1. check the hareware design, following TI's d/s refer. and the EVM refer. design.
    2. pls provide the test waveform and reg. setting ( whether it is complied with above request on INTB settting in d/s)?

    regards,
    Steven
  • pls strictly follow up below setting, including enable intb and clear the intb.

    7.3.12 Interrupt Pin (INTB)
    1. On the DS90UB927Q-Q1 serializer, set register reg_0xC6[5] = 1 and 0xC6[0] = 1 (Table 5) to configure the
    interrupt.
    2. On the serializer, read from ISR register 0xC7 to arm the interrupt for the first time.
    3. When INTB_IN on the deserializer (DS90UB926Q-Q1 or DS90UB928Q-Q1) is set LOW, the INTB pin on the
    serializer also pulls low, indicating an interrupt condition.
    4. The external controller detects INTB = LOW and reads the ISR register (Table 5) to determine the interrupt
    source. Reading this register also clears and resets the interrupt.



    Steven
  • The left is 927 waveform,and right is 928 waveform.

    and i set register like this:

    1._927_read_reg(client, 0x00, rbuf)                                                           ---------  0x00 -> 0x18(927 i2c address)

    2._927_write_reg(client, 0x03, rbuf[0] | 0x08)                                           ----------  0x03 -> 0xba

    3._927_read_reg(client, 0x05, rbuf)                                                            ---------  0x05 -> 0x00

    4._927_read_reg(client, 0x06, rbuf)                                                            ---------  0x06 -> 0x58(928 i2c address)

    5._927_write_reg(client, 0x07, 0xBA)                                                          ---------  0x07 -> 0xBA(TP i2c address)

    6._927_write_reg(client, 0x08, 0xBC)                                                          ---------  0x08 -> 0xBC(TP i2c alias id)

    7._927_read_reg(client, 0x0c, rbuf)                                                             ---------  0x0C -> 0x05(des id)

    8. _927_write_reg(client, 0xC2, rbuf[0] | 0x02)                                           ---------  0xC2 -> 0x82

    9._927_read_reg(client, 0xC7, rbuf)                                                            ---------  0xC7 -> 0x60

    10._927_read_reg(client, 0xC4, rbuf)                                                          ---------  0xC4 -> 0x38

    11._927_write_reg(client, 0xC6, 0x21)                                                         --------- 0xC6 -> 0x21

    12._928_write_reg(client, 0x1D, rbuf[0] | 0x08)                                          --------- 0x1D -> 0x2B

    and some other register value :927   0x0D ->0x00  0x14 -> 0x00           928   0x08 -> 0x00

    Hope your reply,Thanks.