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TPS65982: How to control HRESET/MRESET timing from EC.

Sam Yeh
Prodigy 40 points
Part Number: TPS65982

Hi Team,

We had been meet the TBT device lost when system do S4/S5 stress test, so we control HRESET assert when system on S4/S5 then can fixed as below waveform,

but, extend another issue is meet XHCI yellow ban when control HRESET assert on S4/S5.

therefore, we separate HRESET between 65982 port 1 and port 2 with HW connection as below, them can fixed the XHCI yellow ban issue,

but side effect is 65982 port 2 will no function(load FW fail), could you please tell us how to control HRESET/MRESET/RESETZ timing from EC ?

  • 0
    TI__Mastermind 36756 points

    Hi Sam,

    Each HRESET/MRESET pin should be controlled independently. When the PC transitions from S4/S5 to S0, both PD controllers should be RESET to ensure proper FW loading.

    If this answers your question, PLEASE select This resolved my issue

    Thanks,
    Eric