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SN65LVDS93A: Application review of SN65LVDS93A

Lacey Lin
Intellectual 2900 points
Part Number: SN65LVDS93A
Other Parts Discussed in Thread: DS90CF388

Hi team,

My customer want to use the SN65LVDS93A to serial the SPI signal from the FPGA.

The application diagram is as below:

The data rate is about 100MHz, the SPI signal and the clock is from the FPGA GPIO.

The voltage level is CMOS3.3 and CMOS1.8 or LVDS

So several questions need your support:

1. Can the device support the transmit the SPI signal?

2. Can they use the FPGA GPIO to generate the Clock for the device? Is there any limit for the input clock?

3. They need 2m cable to transmit the data, can you help to recommend the type of the cable?

4. Please help to review if the DS90C302 can support the receiver application?

5. What's the latency different between 4 LVDS output?

Lacey

Thanks a lot!

Thanks a lot!

  • 0
    TI__Mastermind 35130 points
    Hi Lacey,

    1. Yes
    2. They need to use the SPI CLK as the input clock for the SN65LVDS93A if the frequency is 100MHz.
    3. Shielded Cat -5/-6/-7 should be fine.
    4. Yes. However, if they're now certain that the frequency is 100MHz then they can consider the DS90CF388 instead as it is more simple to use than the DS90C3202.
    5. 200ps maximum

    Regards,
    I.K.
  • 0 in reply to Ikechukwu Anyiam
    TI__Intellectual 2900 points
    Hi I.K
    Thanks so much for your reply!
    For the input clock, I have several questions.
    I have checked with customer, the SPI clock will be 10MHz, 64MHz and 122.88MHz.
    1. For example, if I use the SN65LVDS93A to transmit the 122.88MHz SPI clock, So should the input clock of the SN65LVDS93A be exact 122.88MHz?
    2. If the answer for the question 1 is yes. Can they use the FPGA GPIO to generate the 122.88MHz for the clock input of SN65LVDS93A or they must use the SPI clock for the SN65LVDS93A?
    3. What's the requirement of the input clock and the input data rate? if the input data rate is 122.88MHz, what's the maximum frequency deviation between the input data and the input clock?
    Lacey
    Thanks a lot!
  • 0 in reply to Lacey Lin
    TI__Mastermind 35130 points
    Hi Lacey,

    1. You should connect the SPI clock to the input clock for this case.
    2. See above.
    3. We don't have a specification for this requirement since it's assumed the input clock and data are coming from the same source and are synchronous. This should also be the case for their application (input data synchronous to SPI CLK and coming from same source).

    Regards,
    I.K.