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TCAN4550-Q1: How to force ECC single bit error

Part Number: TCAN4550-Q1

Hello Expert,

I'd like to use ECC self test by injecting an ECC error. The message RAM on TCAN45x is 2KB in total, what is the size of ECC memory area? How many ECC bits are used for 64-bit memory data?

In the test register (080C), I wrote 0x000000 to [21:16] to select bit 0 (same for bit 1?), and set bit 12 to force a single bit ECC error, then I read bit 11, but this bit is not set. How can use this feature? What do [31:24] (Test Read and Write register) and [23:22] (Test Read and Write) mean? and What value should I write to those bit field?

 
Thanks for help
 
  • Hi QJ,

    Sorry for the delay, but we are looking into this and will try to get back to you by tomorrow.

    Max
  • QJ,

    You can ignore the "Test Read and Write" bits, and in fact in the latest version of the datasheet are just labeled as "Reserved" bits.

    For each 32-bit message, there are 7 ECC bits to correct an accidental bit flip.

    This register is mostly just used to verify that the ECC feature on the device works, which doesn't have much use for an application because this was already validated in the device development. However, when forcing the ECC, once the MRAM is accessed, it should force the ECC error and bit 11 should indicate by reading as a "1". Are you accessing the MRAM after the force ECC error bit is set to 1?

    Regards,
  • Thanks Eric,

    This feature is good. Customer can use this feature to make sure the error correction is working. TCAN45x supports 1-bit error correction.