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DP83822H: PHY for a new design

Part Number: DP83822H

Hi,

My customer is planning to use the PHY for a new design. For the same I have some queries as follows:

 

  1. PHY to MAC communication through RMII is facilitated by the chip?
  2. For master mode & slave mode we need to provide 50 MHz & 25 MHz clks respectively. So, if we want to use the same module to be configurable to both modes, do we need to put two oscillators in switched manner? Kindly clarify.
  3. In RMII mode, TX_CLK & RX_CLK will be unused. At which pin Ref. CLK will be available to be routed to MAC.

Regards,

Aniket

  • Hi Aniket,

    1. DP83822 supports MII, RMII and RGMII MAC interface

    2. Master mode actually needs 25MHz and Slave mode needs 50MHz. If you want to support both modes, you will need to have a way to switch between 25MHz and 50MHz with proper connection between the PHY and the MAC.

    3. In RMII Master mode, a 50-MHz output clock will automatically be enabled on RX_D3 (GPIO3).

    Regards,

    Hung Nguyen