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SN65HVD08: Confusion about datasheet

Part Number: SN65HVD08
Other Parts Discussed in Thread: THVD1550

Hi team, I have below questions about SN65HVD08 datasheet.

  • In datasheet p5 table 6.6, ten, driver enable time is 55 ns/6us. I cannot find figure 3 and figure 4. Please help share me what the meaning of this spec.
  • If I want to send data to 485 bus, I will let DE=1, RE=0, how much time I should delay when  FPGA send data to bus?

  • Charles,

    Thanks for pointing this out. You can refer to Fig 14 and Fig 15 on the datasheet of THVD1550 for the missing figures. In your case, the delay is 55ns, since the receiver is on. The only scenario you will see 6us is to enable the device with both TX and RX disabled. Please let me know if you have more questions.

    Regards,
    Hao
  • In some application, customer will connect DE/RE together, which means they need 6 us delay all the time. Right?

  • Charles,

    It's a good question. Since either TX or RX keeps working alternatively, the device would not go into the disable mode. Therefore you won't see 6us delay, which is the delay the device needs to get out of the disable mode. Please let me know if it still doesn't make sense to you.

    Regards,
    Hao
  • Hao, thank you for your response. But when I set DE=RE=1, the receiver is disabled. This is disabled mode, right? I think we still need 6 us delay before sending data to bus. I do not quiet understand what the disable mode you mean.
  • Charles,

    I'm sorry I didn't make it clear. By disable mode, I meant both TX and RX are disabled. In this case, the device shuts down most of the circuitry to save power. If DE=RE=1, TX is on, the device is still active. Please let me know if it makes sense or if you have more questions.

    Regards,

    Hao