Other Parts Discussed in Thread: THVD1550
Hi team, I have below questions about SN65HVD08 datasheet.
- In datasheet p5 table 6.6, ten, driver enable time is 55 ns/6us. I cannot find figure 3 and figure 4. Please help share me what the meaning of this spec.
- If I want to send data to 485 bus, I will let DE=1, RE=0, how much time I should delay when FPGA send data to bus?