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DS90UB926Q-Q1: link error count

bandit gangwere
Intellectual 855 points
Part Number: DS90UB926Q-Q1
Other Parts Discussed in Thread: ALP

SNLS422D - July 2012 - aug 2017, pg 45 register 0x41 Link error count

the LS nybble sets the link error threshold.

BUT no apparent register to read the number of link errors. What am I missing?

Please advise ... bandit

  • 0
    TI__Intellectual 1565 points

    Hi bandit,

    With this product you can only get a link error count when in BIST mode.

    How do you want to use an error count?

    • For radiated immunity testing, I monitor the LOCK pin.  You can monitor it with an oscilloscope that has a trigger output and connect the trigger output to a pulse counter.  Set the scope trigger to NORMAL/FALLING_EDGE/1V.  For BCI I have the scope/etc in the screen room, but for antenna-based immunity testing you would need to use an optical probe with a fiber cable so the equipment stays outside the screen room.
    • To characterize the link before releasing to manufacturing, use the BIST function and then the margin analysis tool available in our ALP GUI.
    • For channel health monitoring during normal operation in your final product, monitor the LOCK/PASS pins with GPIOs from your processor.

    Does this help?

    Mike

  • 0 in reply to Mike Leister
    Intellectual 855 points

    My goal is runtime monitoring of errors. I know I can look at the RC error counts.

    Unfortunately, for this application and current hardware, i do not have direct access to the DES, which means I cannot run the BIST.

    The current hardware just has LEDs on the LINK/PASS pins. We will need to add that capability to the next gen HW.

    However, my original question stands: Where is the register with the Link Error Count? You only have a register with the limit of Link errors that will be counted.

    Thanks ... bandit

  • 0 in reply to bandit gangwere
    TI__Intellectual 1565 points
    Bandit,

    The 926 does not come with Link Error Count. Connecting LOCK to a HW interrupt pin is the only solution I can think of.

    The 934 has error counters.

    Mike
  • 0 in reply to Mike Leister
    Intellectual 855 points
    This implies the 926 does not have register 0x41. If so, might want to correct the datasheet.
    All I can do for now is look at CRC errors...

    Thanks! ... bandit
  • 0 in reply to bandit gangwere
    TI__Intellectual 1565 points
    Hi Bandit,

    0x41 is programmed by the user to allow more that one link error before LOCK is dropped. This can be useful during immunity or system level ESD optimization.

    From the 0x41 register description:

    "Link error count threshold. Counter is pixel clock based. clk0, clk1 and DCA are monitored for link errors, if error count is enabled,
    deserializer loose lock once error count reaches threshold. If disabled deserilizer loose lock with one error."

    The 926 gives you access to the threshold but not the counter itself. We added access to the error counter starting with the 93x family.

    Mike
  • 0 in reply to Mike Leister
    Intellectual 855 points
    Thanks! Makes more sense now..