DP83822I: DP83822I auto-negotiation failing

Hi Dave,

Can you also share the schematics?

-Regards
Aniruddha

Hi Aniruddha,

Please find attached - nothing is strapped - I'm MDIOing all configuration

Dave

Hi Aniruddha,

Have you got any suggestions on this?

Kind regards,

Dave

This has now been almost 3 weeks since our last contact from TI on this - our TI distributor in the UK is recommending we look at a Microchip alternative if we can't move forward. Please can I have some suggestions of what to look at or confirmation this is being looked at?

Kind regard,

Dave

Hi David,

Our apologies for late response. I looked at schematics and magentics connections, external terminations and they looks ok.

Also, register 0x04 and register 0x05 contents ( Auto Nego value of DUT and Link Partner are looking ) . Ok. I need to get the register dumps from 0x00 to 0x1F.

You mention you are performing the configuration from the MDIO/MDC interface. Are you triggering the soft reset after the last configuration ? Can you share the configuration you are programming thru MDIO/MDC ?

Also, on 0x467 and 0x468: These provides the mode particular strap is programed. However these registers are in extended register space and needs special mechansim to read the content. Procedure is defined in datasheet. Please check you are using the same procedure and values of these  register shared is correct.

Regards,
Geet

Hi Geet,

The registers 0x00 - 0x1F:

0 - 0x1000
1 - 0x7849
2 - 0x2000
3 - 0xa240
4 - 0x1e1
5 - 0xc1e1
6 - 0xf
7 - 0x2001
8 - 0x4000
9 - 0x0
10 - 0x100
11 - 0x1000
12 - 0x0
13 - 0x0
14 - 0x0
15 - 0x0
16 - 0x4002
17 - 0x108
18 - 0x6000
19 - 0x6800
20 - 0x0
21 - 0x0
22 - 0x700
23 - 0x261
24 - 0x400
25 - 0x8021
26 - 0x0
27 - 0x7d
28 - 0x5ee
29 - 0x0
30 - 0x102
31 - 0x0

I'm not explicitly doing a soft reset after the MDIO configuration - I'll have to check the code. Are you meaning bit 15 of BMCR or the bits in PHYRSR? Obviously I don't want to lose the register configurations - should I be doing something with the Digital Restart bit in PHYRCR?

Dave

Forget these:

0x467 = 0x2001
0x468 = 0x4000

Dave

I've added a write to register 0x1F of 0x4000 to do set Digital Restart bit in PHYRCR at the end of my configuration - this has had no effect
Dave

I found an issue with the IOCTRL register (0x0462) getting configured to output a clock on RX_D3 - now this is fixed if I:

1) Disable auto-negotiation in U-BOOT

2) Enable the MII loopback BMCR = 0x6100

I can now ping my own IP address. I still can't ping anything externally so I've been trying to work through the loopback options in the BISCR (0x0016) to see where it's failing - looping back in any of the modes:

1) Disable loopback in BMCR = 0x2100 then

2) Loopback PCS input BISCR = 0x0001 - ping fails

3) Loopback PCS Output BISCR = 0x0002 - ping fails

4) Digital loopback BISCR = 0x0004 - ping fails

Is there anything else I need to do to use the BISCR loopback modes? Does the fact that anything deeper than a MII level loopback fails suggest anything?

Dave

This still isn't working. If I forget auto-negotiation for the moment and set the PHY into 10Mb full-duplex (BMCR = 0x0100) I'm seeing the Link Status bit in BMSR becoming set, even with no cable plugged in. I've removed the magnetic and the link detect is still getting set. I've now just shorted the input pins RD_P and RD_M together at the termination resistors and the link detect bit is STILL getting set (BMSR = 0x784d) - what is this suggesting?

Dave

HI,

From your April 2 post, looks like the Link is not getting setup with Link Partner. Also register 0x0010 : 0x4002 indicates Auto Negotiation is not converging.


I can see you have shared the register dump with no Link-UP. However want to ensure if you have made some changes from the past, hence the repeat request. Can you share the register dump with Link Partner connected to Phy ?


1. 0x0000 to 0x001F
2. 0x0467, 0x0468

Regards,
Geet