Hello,
I have a question about CSR register 0xE5 bit 0.
Once that the unlock condition is detected, will the error bit still remain "1" after PLL lock?
Best Regards,
Naoki Aoyama
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Hello,
I have a question about CSR register 0xE5 bit 0.
Once that the unlock condition is detected, will the error bit still remain "1" after PLL lock?
Best Regards,
Naoki Aoyama