CCS/DS90UB954-Q1: DS90UB954-Q1 connect to DS90UB953-Q1 by coaxial cable

Hello,

please double check the settings of your devices. Also check which clocking mode are you using, BC synch or external oscillator?
On the 954 check reg 0x58 and 0x6D

We had checked all schematic 、clock and settings that all the same with DS90UB954-Q1 EVM. But when we try to run for 50 MHz, the 954 reg is 0x7C.
Please help me to fix the issue.
Thanks.

DIAMOND

Can you answer following questions:

1) what are the values of these registers on the 954: 0x03, 0x04, 0x58, 0x6D.
2) and on the 953: 0x02, 0x03, 0x04, 0x05, 0x50.
3) what are the values of the used Oscillators/ Crystals on both sides, 953 and 954?
4)What are the resistors values used on MODE pins for both, 953 and 954?

Hi Hamzeh,

I'm also a member in this project team and reply here with additional info about our problem.

Our HW design followed the d/s using CSI-2 synchronous coax mode (with POC). 

Init configuration script:

UB954ID = 0x60
UB953ID = 0x30
UB953Alias = 0x18

board.WriteI2C(UB954ID, 0x01, 0x06)
board.WriteI2C(UB954ID, 0x4C, 0x01)
board.WriteI2C(UB954ID, 0x58, 0x5E)
board.WriteI2C(UB954ID, 0x0C, 0x01)
board.WriteI2C(UB954ID, 0x5C, UB953Alias)
board.WriteI2C(UB953Alias, 0x02, 0x73)

1) 954 registers

• 0x03 = 0x20
• When set 954 0x58=0x5D, both LOCKPASS pin high, 0x04=0xDF
• When set 954 0x58=0x5E, both LOCK/PASS pin low, 0x04=0xD3
• 0x6D = 0x7C

2) 953 registers

• 0x02 = 0x73
• 0x03 = 0x48
• 0x04 = 0x00
• 0x05 = 0x03
• 0x50 = 0x20

3) Oscillator on 954 side is 25M. 953 side has no oscillator(Official EVM).

4) MODE pin resister value:

• 954: R-high=2K, R-low=2.6K (MODE pin measured 1.0V)
• 953: Official EVM setting (Follow up the user manual Figuare4. J8 open)

Thanks for your support!!

Hello Kiwi,

Please use the resistors values recommended on the datasheet for 954 Mode Pin. See 954 d/s page 29.
Also, you do not need to write in reg 0x01 = 0x06 on the 954.
Does your design follows the power-up sequence explained in the 954 d/s page 148 ?

Hi Hamzeh,

We replaced 954 mode resisters and confirmed the power sequence same with 954 d/s.

The problem still there.

954 d/s page 148 says sensitive circuits may need external filter.

We're currently trying to tune the capacitor/filter.

Do you have any suggestion?

BTW.

954 d/s figure 57 says VDD11 rised after PDB (VDD_SEL=LOW).

Does it means the internal VDD11 LDO start working until PDB rised?

Thanks!

Can you please explain the seen issue again, I believe your system shows the wrong frequency?

Hi Hamzeh,

Sorry not describe my question clearly.
I've two questions:

1. FPD3 freqency
Our 954 kit connect to 953 EVM.
If set 954 0x58=0x5E, both LOCK/PASS low and 0x04=0xD3.
If set 954 0x58=0x5D, both LOCK/PASS high and 0x04=0xDF.
We found maybe problem dues to capacitor value(supply noise), and are trying to fix it now.
You can ignore this one. :)

2. 954 power sequence.
Currently we use HW option (R/C) to delay PDB rising.
But we would like to change it to use SW option (GPIO) to pull PDB high/low.
Our VDD_SEL=LOW, according to 954 d/s figure 55 it seems don't care VDD11, but figure 57 the VDD11 raised AFTER PDB high.
I confused does the internal VDD11 LDO start working after PDB pulled high?
Or the internal VDD11 LDO start working when supply VDD18 regardless PDB high or low?

Thanks