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Linux/DP83TC811SEVM: MDM9607 SGMII signal driver issue during ping test.

Part Number: DP83TC811SEVM
Other Parts Discussed in Thread: DP83TC811EVM

Tool/software: Linux

Hi, Ti,

  We are using qcom mdm9607 to connect to DP83TC811SEVM, control connected by MDC / MDIO, and data connected by SGMII.

  From SOC SGMII port we use osciloscope to catch driver signal, it's 62.5MHz and peak to peak is only 200mv or so.

  Ping from SOC to PC or from PC to SOC, it's no respond.

  Please let me know if this signal is OK.

Regards,

  • During test, all status are good.

    My suspect:

    1. On DP83TC811EVM, there is no connection between DP83822 and 811. --- If there is some settings need to operate? From user's guide I didn't find clue.

    2. If the driven voltage of SGMII port is enough?

    Details as follow:

    root@mdm9607:~# ethtool eth0

    Settings for eth0:

            Supported ports: [ TP AUI BNC MII FIBRE ]

            Supported link modes:   Not reported

            Supported pause frame use: Symmetric Receive-only

            Supports auto-negotiation: No

            Advertised link modes:  Not reported

            Advertised pause frame use: Symmetric Receive-only

            Advertised auto-negotiation: No

            Speed: 10Mb/s

            Duplex: Half

            Port: MII

            PHYAD: 0

            Transceiver: external

            Auto-negotiation: on

            Supports Wake-on: pg

            Wake-on: p

            Current message level: 0x00007fff (32767)

                                   drv probe link timer ifdown ifup rx_err tx_err tx_queued intr tx_done rx_status pktdata hw wol

            Link detected: yes

    root@mdm9607:~# ethtool -S eth0

    NIC statistics:

         tx byte cnt: 1818

         tx sz 64: 5

         tx sz 65 127: 19

         tx mcast byte: 1818

    root@mdm9607:~# ifconfig

    bridge0   Link encap:Ethernet  HWaddr FE:8A:FC:25:6A:FA

              inet addr:192.168.225.1  Bcast:192.168.225.255  Mask:255.255.255.0

              inet6 addr: fe80::fc8a:fcff:fe22:67f7/64 Scope:Link

              UP BROADCAST RUNNING PROMISC MULTICAST  MTU:1500  Metric:1

              RX packets:0 errors:0 dropped:0 overruns:0 frame:0

              TX packets:27 errors:0 dropped:0 overruns:0 carrier:0

              collisions:0 txqueuelen:0

              RX bytes:0 (0.0 B)  TX bytes:2056 (2.0 KiB)

     

    eth0      Link encap:Ethernet  HWaddr AA:00:11:22:33:44

              inet addr:169.254.4.1  Bcast:169.254.4.255  Mask:255.255.255.0

              inet6 addr: fe80::a800:11ff:fe22:3344/64 Scope:Link

              UP BROADCAST RUNNING MULTICAST  MTU:1500  Metric:1

              RX packets:0 errors:0 dropped:0 overruns:0 frame:0

              TX packets:26 errors:0 dropped:0 overruns:0 carrier:0

              collisions:0 txqueuelen:1000

              RX bytes:0 (0.0 B)  TX bytes:1964 (1.9 KiB)

              Interrupt:47

    root@mdm9607:~# brctl show

    bridge name     bridge id               STP enabled     interfaces

    bridge0         8000.fe8afc256afa       no              eth0

    root@mdm9607:~# route

    Kernel IP routing table

    Destination     Gateway         Genmask         Flags Metric Ref    Use Iface

    169.254.0.0     169.254.4.1     255.255.0.0     UG    0      0        0 eth0

    192.168.225.0   *               255.255.255.0   U     0      0        0 bridge0

    [AT PC SIDE]

    IP : 169.254.132.96

    Netmask : 255.255.0.0

    During ping test, there is no response from peer end.


     

    1. Our verification connection.

    2. Waveform from SGMII during ping test.

    3. MatENet waveform, during or not at ping test mode.

    4. Connection inside DP83TC811EVM, RGMII port signal, there is no data communication at all.

    5. Connect PC with an RJ45 connector, waveform as below:

  • From MAC to PHY, the sgmii interface signal satisfy the requirement, but frequency is only 62.5MHz which now we connect 100Mbps, it's different from spec 625MHz @ 1G bps.

    But from PHY chip, the output to MAC is also 62.5MHz.

    The same time we read register 0x459, for verify the status of sgmii, it's always 0, which means there is no sgmii auto-negotiation page has been received.

    What will cause this issue?

  • Hi,

    We expect SGMII clock to be always 625 MHz. Can you please read register 0x0467 ( Strap Configuration) to ensure PHY is configured in correct mode.

    Regards,
    Geet
  • 822sevm registers value:
    reg432 = 0x0 --- 4 wire SGMII
    reg456 = 0x1008 --- 1.6ms
    reg459 = 0x0 --- SGMII NOT complete, and NO new page received, that means there is no signal received from PHY's opinion...
    reg467 = 0x300 --- SGMII 4 wire mode (MAC0~2 all 0), PHY AD = 0, 100 BASE-T1 Master

    I also read other registers and listed, during PHY link up (Reg1 value are always 0x65) reg459 keeping value 0x0, there is no new page and SGMII auto negotiation is not complete.
    Is that caused by SGMII clock?
    How the SGMII clock generated, from MAC end TX or from PHY? We can see from each side the frequency is 62.5MHz, just like 1/10 requirement.
    Or at negotiation stage it's lower frequency?
  • While I zoom the waveform max, it's like below. The time difference between a and b cusor is 1.6ns which the frequency is 625M, but I can't see if this is LVDS signal at all. Is this LVDS?

  • Dear Geet,

      We have provided waveform, is that OK? And for register values we read, especially for reg459 below:

        reg459 = 0x0 --- SGMII NOT complete, and NO new page received

      The reg459 always keeps 0x0, I think it caused by sgmii signal not match.

      Is there any suggestion from your side?

    Regards,

  • Hi,


    Register indicates Auto-Neg of SGMII is not complete. Is PHY able to establish with link partner ?

    Kindly share the schematics and picture of your setup. SGMII signals are LVDS signal and lines shall be routed differentially.


    Regards,
    Geet
  • Hi, Dear Geet,

      Finnaly we verified the driver using 1 of our customer's boards. So the issue is the board signaling, because the chip is not on the board and SGMII is very high frequency.

      Now the hardware verification will be transfered to hardware engineer, and I'm not sure the schedule.

      So I'll close this issue.

      Thank you very much for your help, very appriciate.

    Regards,